mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-11-01 08:58:07 +00:00
0c993300d5
Fix a conflict between commit4e991e3c16("powerpc: add CFUNC assembly label annotation") and commitb504b6aade("powerpc: differentiate kthread from user kernel thread start"). Fixes:4e991e3c16("powerpc: add CFUNC assembly label annotation") Fixes:b504b6aade("powerpc: differentiate kthread from user kernel thread start") Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230426055848.402993-2-npiggin@gmail.com
772 lines
18 KiB
ArmAsm
772 lines
18 KiB
ArmAsm
#include <asm/asm-offsets.h>
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#include <asm/bug.h>
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#ifdef CONFIG_PPC_BOOK3S
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#include <asm/exception-64s.h>
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#else
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#include <asm/exception-64e.h>
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#endif
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#include <asm/feature-fixups.h>
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#include <asm/head-64.h>
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#include <asm/hw_irq.h>
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#include <asm/kup.h>
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#include <asm/mmu.h>
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#include <asm/ppc_asm.h>
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#include <asm/ptrace.h>
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.align 7
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.macro DEBUG_SRR_VALID srr
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#ifdef CONFIG_PPC_RFI_SRR_DEBUG
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.ifc \srr,srr
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mfspr r11,SPRN_SRR0
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ld r12,_NIP(r1)
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clrrdi r11,r11,2
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clrrdi r12,r12,2
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100: tdne r11,r12
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EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
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mfspr r11,SPRN_SRR1
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ld r12,_MSR(r1)
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100: tdne r11,r12
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EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
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.else
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mfspr r11,SPRN_HSRR0
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ld r12,_NIP(r1)
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clrrdi r11,r11,2
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clrrdi r12,r12,2
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100: tdne r11,r12
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EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
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mfspr r11,SPRN_HSRR1
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ld r12,_MSR(r1)
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100: tdne r11,r12
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EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
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.endif
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#endif
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.endm
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#ifdef CONFIG_PPC_BOOK3S
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.macro system_call_vectored name trapnr
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.globl system_call_vectored_\name
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system_call_vectored_\name:
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_ASM_NOKPROBE_SYMBOL(system_call_vectored_\name)
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SCV_INTERRUPT_TO_KERNEL
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mr r10,r1
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ld r1,PACAKSAVE(r13)
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std r10,0(r1)
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std r11,_NIP(r1)
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std r12,_MSR(r1)
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std r0,GPR0(r1)
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std r10,GPR1(r1)
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std r2,GPR2(r1)
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LOAD_PACA_TOC()
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mfcr r12
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li r11,0
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/* Save syscall parameters in r3-r8 */
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SAVE_GPRS(3, 8, r1)
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/* Zero r9-r12, this should only be required when restoring all GPRs */
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std r11,GPR9(r1)
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std r11,GPR10(r1)
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std r11,GPR11(r1)
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std r11,GPR12(r1)
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std r9,GPR13(r1)
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SAVE_NVGPRS(r1)
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std r11,_XER(r1)
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std r11,_LINK(r1)
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std r11,_CTR(r1)
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li r11,\trapnr
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std r11,_TRAP(r1)
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std r12,_CCR(r1)
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std r3,ORIG_GPR3(r1)
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LOAD_REG_IMMEDIATE(r11, STACK_FRAME_REGS_MARKER)
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std r11,STACK_INT_FRAME_MARKER(r1) /* "regs" marker */
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/* Calling convention has r3 = regs, r4 = orig r0 */
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addi r3,r1,STACK_INT_FRAME_REGS
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mr r4,r0
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BEGIN_FTR_SECTION
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HMT_MEDIUM
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END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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/*
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* scv enters with MSR[EE]=1 and is immediately considered soft-masked.
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* The entry vector already sets PACAIRQSOFTMASK to IRQS_ALL_DISABLED,
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* and interrupts may be masked and pending already.
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* system_call_exception() will call trace_hardirqs_off() which means
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* interrupts could already have been blocked before trace_hardirqs_off,
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* but this is the best we can do.
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*/
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/*
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* Zero user registers to prevent influencing speculative execution
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* state of kernel code.
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*/
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SANITIZE_SYSCALL_GPRS()
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bl CFUNC(system_call_exception)
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.Lsyscall_vectored_\name\()_exit:
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addi r4,r1,STACK_INT_FRAME_REGS
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li r5,1 /* scv */
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bl CFUNC(syscall_exit_prepare)
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std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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.Lsyscall_vectored_\name\()_rst_start:
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lbz r11,PACAIRQHAPPENED(r13)
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andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
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bne- syscall_vectored_\name\()_restart
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li r11,IRQS_ENABLED
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stb r11,PACAIRQSOFTMASK(r13)
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li r11,0
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stb r11,PACAIRQHAPPENED(r13) # clear out possible HARD_DIS
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ld r2,_CCR(r1)
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ld r4,_NIP(r1)
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ld r5,_MSR(r1)
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BEGIN_FTR_SECTION
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stdcx. r0,0,r1 /* to clear the reservation */
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END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
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BEGIN_FTR_SECTION
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HMT_MEDIUM_LOW
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END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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SANITIZE_RESTORE_NVGPRS()
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cmpdi r3,0
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bne .Lsyscall_vectored_\name\()_restore_regs
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/* rfscv returns with LR->NIA and CTR->MSR */
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mtlr r4
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mtctr r5
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/* Could zero these as per ABI, but we may consider a stricter ABI
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* which preserves these if libc implementations can benefit, so
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* restore them for now until further measurement is done. */
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REST_GPR(0, r1)
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REST_GPRS(4, 8, r1)
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/* Zero volatile regs that may contain sensitive kernel data */
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ZEROIZE_GPRS(9, 12)
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mtspr SPRN_XER,r0
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/*
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* We don't need to restore AMR on the way back to userspace for KUAP.
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* The value of AMR only matters while we're in the kernel.
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*/
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mtcr r2
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REST_GPRS(2, 3, r1)
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REST_GPR(13, r1)
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REST_GPR(1, r1)
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RFSCV_TO_USER
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b . /* prevent speculative execution */
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.Lsyscall_vectored_\name\()_restore_regs:
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mtspr SPRN_SRR0,r4
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mtspr SPRN_SRR1,r5
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ld r3,_CTR(r1)
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ld r4,_LINK(r1)
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ld r5,_XER(r1)
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HANDLER_RESTORE_NVGPRS()
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REST_GPR(0, r1)
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mtcr r2
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mtctr r3
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mtlr r4
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mtspr SPRN_XER,r5
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REST_GPRS(2, 13, r1)
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REST_GPR(1, r1)
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RFI_TO_USER
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.Lsyscall_vectored_\name\()_rst_end:
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syscall_vectored_\name\()_restart:
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_ASM_NOKPROBE_SYMBOL(syscall_vectored_\name\()_restart)
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GET_PACA(r13)
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ld r1,PACA_EXIT_SAVE_R1(r13)
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LOAD_PACA_TOC()
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ld r3,RESULT(r1)
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addi r4,r1,STACK_INT_FRAME_REGS
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li r11,IRQS_ALL_DISABLED
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stb r11,PACAIRQSOFTMASK(r13)
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bl CFUNC(syscall_exit_restart)
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std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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b .Lsyscall_vectored_\name\()_rst_start
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1:
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SOFT_MASK_TABLE(.Lsyscall_vectored_\name\()_rst_start, 1b)
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RESTART_TABLE(.Lsyscall_vectored_\name\()_rst_start, .Lsyscall_vectored_\name\()_rst_end, syscall_vectored_\name\()_restart)
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.endm
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system_call_vectored common 0x3000
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/*
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* We instantiate another entry copy for the SIGILL variant, with TRAP=0x7ff0
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* which is tested by system_call_exception when r0 is -1 (as set by vector
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* entry code).
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*/
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system_call_vectored sigill 0x7ff0
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#endif /* CONFIG_PPC_BOOK3S */
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.balign IFETCH_ALIGN_BYTES
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.globl system_call_common_real
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system_call_common_real:
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_ASM_NOKPROBE_SYMBOL(system_call_common_real)
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ld r10,PACAKMSR(r13) /* get MSR value for kernel */
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mtmsrd r10
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.balign IFETCH_ALIGN_BYTES
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.globl system_call_common
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system_call_common:
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_ASM_NOKPROBE_SYMBOL(system_call_common)
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mr r10,r1
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ld r1,PACAKSAVE(r13)
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std r10,0(r1)
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std r11,_NIP(r1)
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std r12,_MSR(r1)
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std r0,GPR0(r1)
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std r10,GPR1(r1)
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std r2,GPR2(r1)
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#ifdef CONFIG_PPC_E500
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START_BTB_FLUSH_SECTION
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BTB_FLUSH(r10)
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END_BTB_FLUSH_SECTION
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#endif
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LOAD_PACA_TOC()
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mfcr r12
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li r11,0
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/* Save syscall parameters in r3-r8 */
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SAVE_GPRS(3, 8, r1)
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/* Zero r9-r12, this should only be required when restoring all GPRs */
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std r11,GPR9(r1)
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std r11,GPR10(r1)
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std r11,GPR11(r1)
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std r11,GPR12(r1)
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std r9,GPR13(r1)
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SAVE_NVGPRS(r1)
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std r11,_XER(r1)
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std r11,_CTR(r1)
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mflr r10
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/*
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* This clears CR0.SO (bit 28), which is the error indication on
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* return from this system call.
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*/
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rldimi r12,r11,28,(63-28)
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li r11,0xc00
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std r10,_LINK(r1)
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std r11,_TRAP(r1)
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std r12,_CCR(r1)
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std r3,ORIG_GPR3(r1)
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LOAD_REG_IMMEDIATE(r11, STACK_FRAME_REGS_MARKER)
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std r11,STACK_INT_FRAME_MARKER(r1) /* "regs" marker */
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/* Calling convention has r3 = regs, r4 = orig r0 */
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addi r3,r1,STACK_INT_FRAME_REGS
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mr r4,r0
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#ifdef CONFIG_PPC_BOOK3S
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li r11,1
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stb r11,PACASRR_VALID(r13)
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#endif
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/*
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* We always enter kernel from userspace with irq soft-mask enabled and
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* nothing pending. system_call_exception() will call
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* trace_hardirqs_off().
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*/
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li r11,IRQS_ALL_DISABLED
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stb r11,PACAIRQSOFTMASK(r13)
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#ifdef CONFIG_PPC_BOOK3S
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li r12,-1 /* Set MSR_EE and MSR_RI */
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mtmsrd r12,1
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#else
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wrteei 1
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#endif
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/*
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* Zero user registers to prevent influencing speculative execution
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* state of kernel code.
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*/
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SANITIZE_SYSCALL_GPRS()
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bl CFUNC(system_call_exception)
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.Lsyscall_exit:
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addi r4,r1,STACK_INT_FRAME_REGS
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li r5,0 /* !scv */
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bl CFUNC(syscall_exit_prepare)
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std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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#ifdef CONFIG_PPC_BOOK3S
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.Lsyscall_rst_start:
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lbz r11,PACAIRQHAPPENED(r13)
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andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
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bne- syscall_restart
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#endif
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li r11,IRQS_ENABLED
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stb r11,PACAIRQSOFTMASK(r13)
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li r11,0
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stb r11,PACAIRQHAPPENED(r13) # clear out possible HARD_DIS
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ld r2,_CCR(r1)
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ld r6,_LINK(r1)
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mtlr r6
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#ifdef CONFIG_PPC_BOOK3S
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lbz r4,PACASRR_VALID(r13)
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cmpdi r4,0
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bne 1f
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li r4,0
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stb r4,PACASRR_VALID(r13)
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#endif
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ld r4,_NIP(r1)
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ld r5,_MSR(r1)
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mtspr SPRN_SRR0,r4
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mtspr SPRN_SRR1,r5
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1:
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DEBUG_SRR_VALID srr
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BEGIN_FTR_SECTION
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stdcx. r0,0,r1 /* to clear the reservation */
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END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
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SANITIZE_RESTORE_NVGPRS()
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cmpdi r3,0
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bne .Lsyscall_restore_regs
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/* Zero volatile regs that may contain sensitive kernel data */
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ZEROIZE_GPR(0)
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ZEROIZE_GPRS(4, 12)
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mtctr r0
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mtspr SPRN_XER,r0
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.Lsyscall_restore_regs_cont:
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BEGIN_FTR_SECTION
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HMT_MEDIUM_LOW
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END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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/*
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* We don't need to restore AMR on the way back to userspace for KUAP.
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* The value of AMR only matters while we're in the kernel.
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*/
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mtcr r2
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REST_GPRS(2, 3, r1)
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REST_GPR(13, r1)
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REST_GPR(1, r1)
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RFI_TO_USER
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b . /* prevent speculative execution */
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.Lsyscall_restore_regs:
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ld r3,_CTR(r1)
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ld r4,_XER(r1)
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HANDLER_RESTORE_NVGPRS()
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mtctr r3
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mtspr SPRN_XER,r4
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REST_GPR(0, r1)
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REST_GPRS(4, 12, r1)
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b .Lsyscall_restore_regs_cont
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.Lsyscall_rst_end:
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#ifdef CONFIG_PPC_BOOK3S
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syscall_restart:
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_ASM_NOKPROBE_SYMBOL(syscall_restart)
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GET_PACA(r13)
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ld r1,PACA_EXIT_SAVE_R1(r13)
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LOAD_PACA_TOC()
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ld r3,RESULT(r1)
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addi r4,r1,STACK_INT_FRAME_REGS
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li r11,IRQS_ALL_DISABLED
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stb r11,PACAIRQSOFTMASK(r13)
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bl CFUNC(syscall_exit_restart)
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std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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b .Lsyscall_rst_start
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1:
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SOFT_MASK_TABLE(.Lsyscall_rst_start, 1b)
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RESTART_TABLE(.Lsyscall_rst_start, .Lsyscall_rst_end, syscall_restart)
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#endif
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/*
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* If MSR EE/RI was never enabled, IRQs not reconciled, NVGPRs not
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* touched, no exit work created, then this can be used.
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*/
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.balign IFETCH_ALIGN_BYTES
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.globl fast_interrupt_return_srr
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fast_interrupt_return_srr:
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_ASM_NOKPROBE_SYMBOL(fast_interrupt_return_srr)
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kuap_check_amr r3, r4
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ld r5,_MSR(r1)
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andi. r0,r5,MSR_PR
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#ifdef CONFIG_PPC_BOOK3S
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beq 1f
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kuap_user_restore r3, r4
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b .Lfast_user_interrupt_return_srr
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1: kuap_kernel_restore r3, r4
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andi. r0,r5,MSR_RI
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li r3,0 /* 0 return value, no EMULATE_STACK_STORE */
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bne+ .Lfast_kernel_interrupt_return_srr
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addi r3,r1,STACK_INT_FRAME_REGS
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bl CFUNC(unrecoverable_exception)
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b . /* should not get here */
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#else
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bne .Lfast_user_interrupt_return_srr
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b .Lfast_kernel_interrupt_return_srr
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#endif
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.macro interrupt_return_macro srr
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.balign IFETCH_ALIGN_BYTES
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.globl interrupt_return_\srr
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interrupt_return_\srr\():
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_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\())
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ld r4,_MSR(r1)
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andi. r0,r4,MSR_PR
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beq interrupt_return_\srr\()_kernel
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interrupt_return_\srr\()_user: /* make backtraces match the _kernel variant */
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_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_user)
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addi r3,r1,STACK_INT_FRAME_REGS
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bl CFUNC(interrupt_exit_user_prepare)
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#ifndef CONFIG_INTERRUPT_SANITIZE_REGISTERS
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cmpdi r3,0
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bne- .Lrestore_nvgprs_\srr
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.Lrestore_nvgprs_\srr\()_cont:
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#endif
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std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
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#ifdef CONFIG_PPC_BOOK3S
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.Linterrupt_return_\srr\()_user_rst_start:
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lbz r11,PACAIRQHAPPENED(r13)
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andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
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bne- interrupt_return_\srr\()_user_restart
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#endif
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li r11,IRQS_ENABLED
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stb r11,PACAIRQSOFTMASK(r13)
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li r11,0
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stb r11,PACAIRQHAPPENED(r13) # clear out possible HARD_DIS
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.Lfast_user_interrupt_return_\srr\():
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SANITIZE_RESTORE_NVGPRS()
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#ifdef CONFIG_PPC_BOOK3S
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.ifc \srr,srr
|
|
lbz r4,PACASRR_VALID(r13)
|
|
.else
|
|
lbz r4,PACAHSRR_VALID(r13)
|
|
.endif
|
|
cmpdi r4,0
|
|
li r4,0
|
|
bne 1f
|
|
#endif
|
|
ld r11,_NIP(r1)
|
|
ld r12,_MSR(r1)
|
|
.ifc \srr,srr
|
|
mtspr SPRN_SRR0,r11
|
|
mtspr SPRN_SRR1,r12
|
|
1:
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
stb r4,PACASRR_VALID(r13)
|
|
#endif
|
|
.else
|
|
mtspr SPRN_HSRR0,r11
|
|
mtspr SPRN_HSRR1,r12
|
|
1:
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
stb r4,PACAHSRR_VALID(r13)
|
|
#endif
|
|
.endif
|
|
DEBUG_SRR_VALID \srr
|
|
|
|
#ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
|
|
lbz r4,PACAIRQSOFTMASK(r13)
|
|
tdnei r4,IRQS_ENABLED
|
|
#endif
|
|
|
|
BEGIN_FTR_SECTION
|
|
ld r10,_PPR(r1)
|
|
mtspr SPRN_PPR,r10
|
|
END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
|
|
|
|
BEGIN_FTR_SECTION
|
|
stdcx. r0,0,r1 /* to clear the reservation */
|
|
FTR_SECTION_ELSE
|
|
ldarx r0,0,r1
|
|
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
|
|
|
|
ld r3,_CCR(r1)
|
|
ld r4,_LINK(r1)
|
|
ld r5,_CTR(r1)
|
|
ld r6,_XER(r1)
|
|
li r0,0
|
|
|
|
REST_GPRS(7, 13, r1)
|
|
|
|
mtcr r3
|
|
mtlr r4
|
|
mtctr r5
|
|
mtspr SPRN_XER,r6
|
|
|
|
REST_GPRS(2, 6, r1)
|
|
REST_GPR(0, r1)
|
|
REST_GPR(1, r1)
|
|
.ifc \srr,srr
|
|
RFI_TO_USER
|
|
.else
|
|
HRFI_TO_USER
|
|
.endif
|
|
b . /* prevent speculative execution */
|
|
.Linterrupt_return_\srr\()_user_rst_end:
|
|
|
|
#ifndef CONFIG_INTERRUPT_SANITIZE_REGISTERS
|
|
.Lrestore_nvgprs_\srr\():
|
|
REST_NVGPRS(r1)
|
|
b .Lrestore_nvgprs_\srr\()_cont
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
interrupt_return_\srr\()_user_restart:
|
|
_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_user_restart)
|
|
GET_PACA(r13)
|
|
ld r1,PACA_EXIT_SAVE_R1(r13)
|
|
LOAD_PACA_TOC()
|
|
addi r3,r1,STACK_INT_FRAME_REGS
|
|
li r11,IRQS_ALL_DISABLED
|
|
stb r11,PACAIRQSOFTMASK(r13)
|
|
bl CFUNC(interrupt_exit_user_restart)
|
|
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
|
|
b .Linterrupt_return_\srr\()_user_rst_start
|
|
1:
|
|
|
|
SOFT_MASK_TABLE(.Linterrupt_return_\srr\()_user_rst_start, 1b)
|
|
RESTART_TABLE(.Linterrupt_return_\srr\()_user_rst_start, .Linterrupt_return_\srr\()_user_rst_end, interrupt_return_\srr\()_user_restart)
|
|
#endif
|
|
|
|
.balign IFETCH_ALIGN_BYTES
|
|
interrupt_return_\srr\()_kernel:
|
|
_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel)
|
|
addi r3,r1,STACK_INT_FRAME_REGS
|
|
bl CFUNC(interrupt_exit_kernel_prepare)
|
|
|
|
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
|
|
.Linterrupt_return_\srr\()_kernel_rst_start:
|
|
ld r11,SOFTE(r1)
|
|
cmpwi r11,IRQS_ENABLED
|
|
stb r11,PACAIRQSOFTMASK(r13)
|
|
beq .Linterrupt_return_\srr\()_soft_enabled
|
|
|
|
/*
|
|
* Returning to soft-disabled context.
|
|
* Check if a MUST_HARD_MASK interrupt has become pending, in which
|
|
* case we need to disable MSR[EE] in the return context.
|
|
*
|
|
* The MSR[EE] check catches among other things the short incoherency
|
|
* in hard_irq_disable() between clearing MSR[EE] and setting
|
|
* PACA_IRQ_HARD_DIS.
|
|
*/
|
|
ld r12,_MSR(r1)
|
|
andi. r10,r12,MSR_EE
|
|
beq .Lfast_kernel_interrupt_return_\srr\() // EE already disabled
|
|
lbz r11,PACAIRQHAPPENED(r13)
|
|
andi. r10,r11,PACA_IRQ_MUST_HARD_MASK
|
|
bne 1f // HARD_MASK is pending
|
|
// No HARD_MASK pending, clear possible HARD_DIS set by interrupt
|
|
andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
|
|
stb r11,PACAIRQHAPPENED(r13)
|
|
b .Lfast_kernel_interrupt_return_\srr\()
|
|
|
|
|
|
1: /* Must clear MSR_EE from _MSR */
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
li r10,0
|
|
/* Clear valid before changing _MSR */
|
|
.ifc \srr,srr
|
|
stb r10,PACASRR_VALID(r13)
|
|
.else
|
|
stb r10,PACAHSRR_VALID(r13)
|
|
.endif
|
|
#endif
|
|
xori r12,r12,MSR_EE
|
|
std r12,_MSR(r1)
|
|
b .Lfast_kernel_interrupt_return_\srr\()
|
|
|
|
.Linterrupt_return_\srr\()_soft_enabled:
|
|
/*
|
|
* In the soft-enabled case, need to double-check that we have no
|
|
* pending interrupts that might have come in before we reached the
|
|
* restart section of code, and restart the exit so those can be
|
|
* handled.
|
|
*
|
|
* If there are none, it is be possible that the interrupt still
|
|
* has PACA_IRQ_HARD_DIS set, which needs to be cleared for the
|
|
* interrupted context. This clear will not clobber a new pending
|
|
* interrupt coming in, because we're in the restart section, so
|
|
* such would return to the restart location.
|
|
*/
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
lbz r11,PACAIRQHAPPENED(r13)
|
|
andi. r11,r11,(~PACA_IRQ_HARD_DIS)@l
|
|
bne- interrupt_return_\srr\()_kernel_restart
|
|
#endif
|
|
li r11,0
|
|
stb r11,PACAIRQHAPPENED(r13) // clear the possible HARD_DIS
|
|
|
|
.Lfast_kernel_interrupt_return_\srr\():
|
|
SANITIZE_RESTORE_NVGPRS()
|
|
cmpdi cr1,r3,0
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
.ifc \srr,srr
|
|
lbz r4,PACASRR_VALID(r13)
|
|
.else
|
|
lbz r4,PACAHSRR_VALID(r13)
|
|
.endif
|
|
cmpdi r4,0
|
|
li r4,0
|
|
bne 1f
|
|
#endif
|
|
ld r11,_NIP(r1)
|
|
ld r12,_MSR(r1)
|
|
.ifc \srr,srr
|
|
mtspr SPRN_SRR0,r11
|
|
mtspr SPRN_SRR1,r12
|
|
1:
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
stb r4,PACASRR_VALID(r13)
|
|
#endif
|
|
.else
|
|
mtspr SPRN_HSRR0,r11
|
|
mtspr SPRN_HSRR1,r12
|
|
1:
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
stb r4,PACAHSRR_VALID(r13)
|
|
#endif
|
|
.endif
|
|
DEBUG_SRR_VALID \srr
|
|
|
|
BEGIN_FTR_SECTION
|
|
stdcx. r0,0,r1 /* to clear the reservation */
|
|
FTR_SECTION_ELSE
|
|
ldarx r0,0,r1
|
|
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
|
|
|
|
ld r3,_LINK(r1)
|
|
ld r4,_CTR(r1)
|
|
ld r5,_XER(r1)
|
|
ld r6,_CCR(r1)
|
|
li r0,0
|
|
|
|
REST_GPRS(7, 12, r1)
|
|
|
|
mtlr r3
|
|
mtctr r4
|
|
mtspr SPRN_XER,r5
|
|
|
|
/*
|
|
* Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse
|
|
* the reliable stack unwinder later on. Clear it.
|
|
*/
|
|
std r0,STACK_INT_FRAME_MARKER(r1)
|
|
|
|
REST_GPRS(2, 5, r1)
|
|
|
|
bne- cr1,1f /* emulate stack store */
|
|
mtcr r6
|
|
REST_GPR(6, r1)
|
|
REST_GPR(0, r1)
|
|
REST_GPR(1, r1)
|
|
.ifc \srr,srr
|
|
RFI_TO_KERNEL
|
|
.else
|
|
HRFI_TO_KERNEL
|
|
.endif
|
|
b . /* prevent speculative execution */
|
|
|
|
1: /*
|
|
* Emulate stack store with update. New r1 value was already calculated
|
|
* and updated in our interrupt regs by emulate_loadstore, but we can't
|
|
* store the previous value of r1 to the stack before re-loading our
|
|
* registers from it, otherwise they could be clobbered. Use
|
|
* PACA_EXGEN as temporary storage to hold the store data, as
|
|
* interrupts are disabled here so it won't be clobbered.
|
|
*/
|
|
mtcr r6
|
|
std r9,PACA_EXGEN+0(r13)
|
|
addi r9,r1,INT_FRAME_SIZE /* get original r1 */
|
|
REST_GPR(6, r1)
|
|
REST_GPR(0, r1)
|
|
REST_GPR(1, r1)
|
|
std r9,0(r1) /* perform store component of stdu */
|
|
ld r9,PACA_EXGEN+0(r13)
|
|
|
|
.ifc \srr,srr
|
|
RFI_TO_KERNEL
|
|
.else
|
|
HRFI_TO_KERNEL
|
|
.endif
|
|
b . /* prevent speculative execution */
|
|
.Linterrupt_return_\srr\()_kernel_rst_end:
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
interrupt_return_\srr\()_kernel_restart:
|
|
_ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel_restart)
|
|
GET_PACA(r13)
|
|
ld r1,PACA_EXIT_SAVE_R1(r13)
|
|
LOAD_PACA_TOC()
|
|
addi r3,r1,STACK_INT_FRAME_REGS
|
|
li r11,IRQS_ALL_DISABLED
|
|
stb r11,PACAIRQSOFTMASK(r13)
|
|
bl CFUNC(interrupt_exit_kernel_restart)
|
|
std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */
|
|
b .Linterrupt_return_\srr\()_kernel_rst_start
|
|
1:
|
|
|
|
SOFT_MASK_TABLE(.Linterrupt_return_\srr\()_kernel_rst_start, 1b)
|
|
RESTART_TABLE(.Linterrupt_return_\srr\()_kernel_rst_start, .Linterrupt_return_\srr\()_kernel_rst_end, interrupt_return_\srr\()_kernel_restart)
|
|
#endif
|
|
|
|
.endm
|
|
|
|
interrupt_return_macro srr
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
interrupt_return_macro hsrr
|
|
|
|
.globl __end_soft_masked
|
|
__end_soft_masked:
|
|
DEFINE_FIXED_SYMBOL(__end_soft_masked, text)
|
|
#endif /* CONFIG_PPC_BOOK3S */
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
_GLOBAL(ret_from_fork_scv)
|
|
bl CFUNC(schedule_tail)
|
|
HANDLER_RESTORE_NVGPRS()
|
|
li r3,0 /* fork() return value */
|
|
b .Lsyscall_vectored_common_exit
|
|
#endif
|
|
|
|
_GLOBAL(ret_from_fork)
|
|
bl CFUNC(schedule_tail)
|
|
HANDLER_RESTORE_NVGPRS()
|
|
li r3,0 /* fork() return value */
|
|
b .Lsyscall_exit
|
|
|
|
_GLOBAL(ret_from_kernel_user_thread)
|
|
bl CFUNC(schedule_tail)
|
|
mtctr r14
|
|
mr r3,r15
|
|
#ifdef CONFIG_PPC64_ELF_ABI_V2
|
|
mr r12,r14
|
|
#endif
|
|
bctrl
|
|
li r3,0
|
|
/*
|
|
* It does not matter whether this returns via the scv or sc path
|
|
* because it returns as execve() and therefore has no calling ABI
|
|
* (i.e., it sets registers according to the exec()ed entry point).
|
|
*/
|
|
b .Lsyscall_exit
|
|
|
|
_GLOBAL(start_kernel_thread)
|
|
bl CFUNC(schedule_tail)
|
|
mtctr r14
|
|
mr r3,r15
|
|
#ifdef CONFIG_PPC64_ELF_ABI_V2
|
|
mr r12,r14
|
|
#endif
|
|
bctrl
|
|
/*
|
|
* This must not return. We actually want to BUG here, not WARN,
|
|
* because BUG will exit the process which is what the kernel thread
|
|
* should have done, which may give some hope of continuing.
|
|
*/
|
|
100: trap
|
|
EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,0
|