mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-28 20:02:17 +00:00
134d9c52fc
The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. We need two additional information from the 'dmas' property: the channel (bit in the dmamux register) that must be accessed and the value of the mux for this channel. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20220427095653.91804-6-miquel.raynal@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
36 lines
943 B
Text
36 lines
943 B
Text
# SPDX-License-Identifier: GPL-2.0
|
|
|
|
#
|
|
# DMA engine configuration for dw
|
|
#
|
|
|
|
config DW_DMAC_CORE
|
|
tristate
|
|
select DMA_ENGINE
|
|
|
|
config DW_DMAC
|
|
tristate "Synopsys DesignWare AHB DMA platform driver"
|
|
depends on HAS_IOMEM
|
|
select DW_DMAC_CORE
|
|
help
|
|
Support the Synopsys DesignWare AHB DMA controller. This
|
|
can be integrated in chips such as the Intel Cherrytrail.
|
|
|
|
config RZN1_DMAMUX
|
|
tristate "Renesas RZ/N1 DMAMUX driver"
|
|
depends on DW_DMAC
|
|
depends on ARCH_RZN1 || COMPILE_TEST
|
|
help
|
|
Support the Renesas RZ/N1 DMAMUX which is located in front of
|
|
the Synopsys DesignWare AHB DMA controller located on Renesas
|
|
SoCs.
|
|
|
|
config DW_DMAC_PCI
|
|
tristate "Synopsys DesignWare AHB DMA PCI driver"
|
|
depends on PCI
|
|
depends on HAS_IOMEM
|
|
select DW_DMAC_CORE
|
|
help
|
|
Support the Synopsys DesignWare AHB DMA controller on the
|
|
platforms that enumerate it as a PCI device. For example,
|
|
Intel Medfield has integrated this GPDMA controller.
|