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db57f88e4c
We can still override these settings via mach/memory.h, but let's provide sensible defaults so that SPARSEMEM is available in the multiplatform kernels. Two platforms currently use SECTION_SIZE_BITS < 28, but are expected to work with 28 (albeit slightly less efficiently if not all banks are populated): - mach-rpc: uses 26 bits. Based on mach/hardware.h it looks like this platform puts RAM at 0x1000_0000 - 0x1fff_ffff, and I/O below 0x1000_0000. - mach-sa1100: uses 27 bits. mach/memory.h indicates that RAM occupies the entire range of 0xc000_0000 - 0xdfff_ffff. But Arnd says in that rpc and sa1100 will never have to use the default since they cannot be part of a multiplatform kernel, and that is unlikely to change. Several platforms need MAX_PHYSMEM_BITS >= 36 so we'll pick that as the minimum. Anything higher and we'll fail the SECTIONS_WIDTH + NODES_WIDTH + ZONES_WIDTH test in <linux/mm.h>. Some analysis from Russell King at http://lists.infradead.org/pipermail/linux-arm-kernel/2014-October/298957.html: I think this is fine in as far as it goes - this means we end up with 256 entries in the mem_section array which means it occupies one page, which I think is acceptable overhead. The other thing to be aware of here is the obvious: #if (MAX_ORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS #error Allocator MAX_ORDER exceeds SECTION_SIZE #endif Which means that with 28 bits of section, that's a maximum allocator order of 16. We appear to allow FORCE_MAX_ZONEORDER to be set up to 64 in the case of shmobile, which doesn't seem like a sensible upper limit - and certainly isn't when sparsemem is enabled. Given this, I think that FORCE_MAX_ZONEORDER's help, and the dependencies probably could do with some improvement to make the issues more transparent. [gregory.0xf0: added notes from Arnd and Russell] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
25 lines
677 B
C
25 lines
677 B
C
#ifndef ASMARM_SPARSEMEM_H
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#define ASMARM_SPARSEMEM_H
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#include <asm/memory.h>
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/*
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* Two definitions are required for sparsemem:
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*
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* MAX_PHYSMEM_BITS: The number of physical address bits required
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* to address the last byte of memory.
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*
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* SECTION_SIZE_BITS: The number of physical address bits to cover
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* the maximum amount of memory in a section.
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*
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* Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000,
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* then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26.
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*
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* These can be overridden in your mach/memory.h.
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*/
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#if !defined(MAX_PHYSMEM_BITS) || !defined(SECTION_SIZE_BITS)
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#define MAX_PHYSMEM_BITS 36
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#define SECTION_SIZE_BITS 28
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#endif
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#endif
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