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8d539b84f1
The APIs that allow backtracing across CPUs have always had a way to exclude the current CPU. This convenience means callers didn't need to find a place to allocate a CPU mask just to handle the common case. Let's extend the API to take a CPU ID to exclude instead of just a boolean. This isn't any more complex for the API to handle and allows the hardlockup detector to exclude a different CPU (the one it already did a trace for) without needing to find space for a CPU mask. Arguably, this new API also encourages safer behavior. Specifically if the caller wants to avoid tracing the current CPU (maybe because they already traced the current CPU) this makes it more obvious to the caller that they need to make sure that the current CPU ID can't change. [akpm@linux-foundation.org: fix trigger_allbutcpu_cpu_backtrace() stub] Link: https://lkml.kernel.org/r/20230804065935.v4.1.Ia35521b91fc781368945161d7b28538f9996c182@changeid Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Michal Hocko <mhocko@suse.com> Cc: kernel test robot <lkp@intel.com> Cc: Lecopzer Chen <lecopzer.chen@mediatek.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Pingfan Liu <kernelfans@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
98 lines
3 KiB
C
98 lines
3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* irq.h: IRQ registers on the 64-bit Sparc.
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*
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* Copyright (C) 1996 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
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*/
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#ifndef _SPARC64_IRQ_H
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#define _SPARC64_IRQ_H
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#include <linux/linkage.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <asm/pil.h>
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#include <asm/ptrace.h>
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/* IMAP/ICLR register defines */
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#define IMAP_VALID 0x80000000UL /* IRQ Enabled */
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#define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */
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#define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */
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#define IMAP_TID_SHIFT 26
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#define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */
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#define IMAP_AID_SHIFT 26
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#define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */
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#define IMAP_NID_SHIFT 21
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#define IMAP_IGN 0x000007c0UL /* IRQ Group Number */
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#define IMAP_INO 0x0000003fUL /* IRQ Number */
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#define IMAP_INR 0x000007ffUL /* Full interrupt number*/
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#define ICLR_IDLE 0x00000000UL /* Idle state */
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#define ICLR_TRANSMIT 0x00000001UL /* Transmit state */
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#define ICLR_PENDING 0x00000003UL /* Pending state */
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/* The largest number of unique interrupt sources we support.
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* If this needs to ever be larger than 255, you need to change
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* the type of ino_bucket->irq as appropriate.
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*
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* ino_bucket->irq allocation is made during {sun4v_,}build_irq().
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*/
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#define NR_IRQS (2048)
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void irq_install_pre_handler(int irq,
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void (*func)(unsigned int, void *, void *),
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void *arg1, void *arg2);
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#define irq_canonicalize(irq) (irq)
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unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
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unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
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unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
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unsigned int sun4v_build_msi(u32 devhandle, unsigned int *irq_p,
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unsigned int msi_devino_start,
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unsigned int msi_devino_end);
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void sun4v_destroy_msi(unsigned int irq);
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unsigned int sun4u_build_msi(u32 portid, unsigned int *irq_p,
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unsigned int msi_devino_start,
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unsigned int msi_devino_end,
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unsigned long imap_base,
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unsigned long iclr_base);
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void sun4u_destroy_msi(unsigned int irq);
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unsigned int irq_alloc(unsigned int dev_handle, unsigned int dev_ino);
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void irq_free(unsigned int irq);
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void fixup_irqs(void);
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static inline void set_softint(unsigned long bits)
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{
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__asm__ __volatile__("wr %0, 0x0, %%set_softint"
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: /* No outputs */
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: "r" (bits));
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}
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static inline void clear_softint(unsigned long bits)
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{
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__asm__ __volatile__("wr %0, 0x0, %%clear_softint"
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: /* No outputs */
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: "r" (bits));
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}
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static inline unsigned long get_softint(void)
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{
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unsigned long retval;
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__asm__ __volatile__("rd %%softint, %0"
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: "=r" (retval));
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return retval;
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}
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void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
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int exclude_cpu);
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#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
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extern void *hardirq_stack[NR_CPUS];
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extern void *softirq_stack[NR_CPUS];
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#define NO_IRQ 0xffffffff
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#endif
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