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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation 51 franklin street fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 67 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141333.953658117@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
117 lines
2.1 KiB
C
117 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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*
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* Copyright IBM Corp. 2008
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#ifndef __ASM_PPC_DISASSEMBLE_H__
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#define __ASM_PPC_DISASSEMBLE_H__
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#include <linux/types.h>
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static inline unsigned int get_op(u32 inst)
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{
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return inst >> 26;
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}
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static inline unsigned int get_xop(u32 inst)
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{
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return (inst >> 1) & 0x3ff;
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}
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static inline unsigned int get_sprn(u32 inst)
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{
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return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
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}
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static inline unsigned int get_dcrn(u32 inst)
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{
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return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
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}
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static inline unsigned int get_tmrn(u32 inst)
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{
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return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
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}
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static inline unsigned int get_rt(u32 inst)
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{
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return (inst >> 21) & 0x1f;
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}
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static inline unsigned int get_rs(u32 inst)
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{
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return (inst >> 21) & 0x1f;
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}
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static inline unsigned int get_ra(u32 inst)
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{
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return (inst >> 16) & 0x1f;
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}
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static inline unsigned int get_rb(u32 inst)
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{
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return (inst >> 11) & 0x1f;
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}
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static inline unsigned int get_rc(u32 inst)
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{
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return inst & 0x1;
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}
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static inline unsigned int get_ws(u32 inst)
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{
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return (inst >> 11) & 0x1f;
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}
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static inline unsigned int get_d(u32 inst)
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{
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return inst & 0xffff;
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}
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static inline unsigned int get_oc(u32 inst)
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{
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return (inst >> 11) & 0x7fff;
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}
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static inline unsigned int get_tx_or_sx(u32 inst)
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{
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return (inst) & 0x1;
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}
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#define IS_XFORM(inst) (get_op(inst) == 31)
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#define IS_DSFORM(inst) (get_op(inst) >= 56)
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/*
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* Create a DSISR value from the instruction
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*/
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static inline unsigned make_dsisr(unsigned instr)
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{
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unsigned dsisr;
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/* bits 6:15 --> 22:31 */
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dsisr = (instr & 0x03ff0000) >> 16;
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if (IS_XFORM(instr)) {
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/* bits 29:30 --> 15:16 */
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dsisr |= (instr & 0x00000006) << 14;
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/* bit 25 --> 17 */
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dsisr |= (instr & 0x00000040) << 8;
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/* bits 21:24 --> 18:21 */
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dsisr |= (instr & 0x00000780) << 3;
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} else {
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/* bit 5 --> 17 */
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dsisr |= (instr & 0x04000000) >> 12;
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/* bits 1: 4 --> 18:21 */
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dsisr |= (instr & 0x78000000) >> 17;
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/* bits 30:31 --> 12:13 */
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if (IS_DSFORM(instr))
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dsisr |= (instr & 0x00000003) << 18;
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}
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return dsisr;
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}
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#endif /* __ASM_PPC_DISASSEMBLE_H__ */
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