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![Christophe Leroy](/assets/img/avatar_default.png)
bl;mflr is used at several places to get code position.
Use bcl 20,31,+4 instead of bl in order to preserve link stack.
See commit c974809a26
("powerpc/vdso: Avoid link stack corruption
in __get_datapage()") for details.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c6eabb4fb6c156f75d56dcbcc6f243e5ac0fba42.1629791763.git.christophe.leroy@csgroup.eu
205 lines
5.2 KiB
ArmAsm
205 lines
5.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Code to process dynamic relocations for PPC32.
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*
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* Copyrights (C) IBM Corporation, 2011.
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* Author: Suzuki Poulose <suzuki@in.ibm.com>
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*
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* - Based on ppc64 code - reloc_64.S
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*/
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#include <asm/ppc_asm.h>
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/* Dynamic section table entry tags */
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DT_RELA = 7 /* Tag for Elf32_Rela section */
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DT_RELASZ = 8 /* Size of the Rela relocs */
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DT_RELAENT = 9 /* Size of one Rela reloc entry */
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STN_UNDEF = 0 /* Undefined symbol index */
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STB_LOCAL = 0 /* Local binding for the symbol */
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R_PPC_ADDR16_LO = 4 /* Lower half of (S+A) */
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R_PPC_ADDR16_HI = 5 /* Upper half of (S+A) */
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R_PPC_ADDR16_HA = 6 /* High Adjusted (S+A) */
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R_PPC_RELATIVE = 22
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/*
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* r3 = desired final address
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*/
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_GLOBAL(relocate)
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mflr r0 /* Save our LR */
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bcl 20,31,$+4 /* Find our current runtime address */
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0: mflr r12 /* Make it accessible */
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mtlr r0
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lwz r11, (p_dyn - 0b)(r12)
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add r11, r11, r12 /* runtime address of .dynamic section */
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lwz r9, (p_rela - 0b)(r12)
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add r9, r9, r12 /* runtime address of .rela.dyn section */
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lwz r10, (p_st - 0b)(r12)
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add r10, r10, r12 /* runtime address of _stext section */
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lwz r13, (p_sym - 0b)(r12)
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add r13, r13, r12 /* runtime address of .dynsym section */
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/*
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* Scan the dynamic section for RELA, RELASZ entries
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*/
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li r6, 0
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li r7, 0
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li r8, 0
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1: lwz r5, 0(r11) /* ELF_Dyn.d_tag */
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cmpwi r5, 0 /* End of ELF_Dyn[] */
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beq eodyn
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cmpwi r5, DT_RELA
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bne relasz
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lwz r7, 4(r11) /* r7 = rela.link */
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b skip
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relasz:
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cmpwi r5, DT_RELASZ
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bne relaent
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lwz r8, 4(r11) /* r8 = Total Rela relocs size */
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b skip
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relaent:
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cmpwi r5, DT_RELAENT
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bne skip
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lwz r6, 4(r11) /* r6 = Size of one Rela reloc */
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skip:
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addi r11, r11, 8
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b 1b
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eodyn: /* End of Dyn Table scan */
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/* Check if we have found all the entries */
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cmpwi r7, 0
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beq done
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cmpwi r8, 0
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beq done
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cmpwi r6, 0
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beq done
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/*
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* Work out the current offset from the link time address of .rela
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* section.
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* cur_offset[r7] = rela.run[r9] - rela.link [r7]
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* _stext.link[r12] = _stext.run[r10] - cur_offset[r7]
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* final_offset[r3] = _stext.final[r3] - _stext.link[r12]
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*/
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subf r7, r7, r9 /* cur_offset */
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subf r12, r7, r10
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subf r3, r12, r3 /* final_offset */
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subf r8, r6, r8 /* relaz -= relaent */
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/*
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* Scan through the .rela table and process each entry
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* r9 - points to the current .rela table entry
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* r13 - points to the symbol table
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*/
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/*
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* Check if we have a relocation based on symbol
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* r5 will hold the value of the symbol.
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*/
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applyrela:
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lwz r4, 4(r9) /* r4 = rela.r_info */
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srwi r5, r4, 8 /* ELF32_R_SYM(r_info) */
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cmpwi r5, STN_UNDEF /* sym == STN_UNDEF ? */
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beq get_type /* value = 0 */
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/* Find the value of the symbol at index(r5) */
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slwi r5, r5, 4 /* r5 = r5 * sizeof(Elf32_Sym) */
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add r12, r13, r5 /* r12 = &__dyn_sym[Index] */
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/*
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* GNU ld has a bug, where dynamic relocs based on
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* STB_LOCAL symbols, the value should be assumed
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* to be zero. - Alan Modra
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*/
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/* XXX: Do we need to check if we are using GNU ld ? */
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lbz r5, 12(r12) /* r5 = dyn_sym[Index].st_info */
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extrwi r5, r5, 4, 24 /* r5 = ELF32_ST_BIND(r5) */
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cmpwi r5, STB_LOCAL /* st_value = 0, ld bug */
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beq get_type /* We have r5 = 0 */
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lwz r5, 4(r12) /* r5 = __dyn_sym[Index].st_value */
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get_type:
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/* Load the relocation type to r4 */
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extrwi r4, r4, 8, 24 /* r4 = ELF32_R_TYPE(r_info) = ((char*)r4)[3] */
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/* R_PPC_RELATIVE */
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cmpwi r4, R_PPC_RELATIVE
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bne hi16
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lwz r4, 0(r9) /* r_offset */
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lwz r0, 8(r9) /* r_addend */
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add r0, r0, r3 /* final addend */
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stwx r0, r4, r7 /* memory[r4+r7]) = (u32)r0 */
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b nxtrela /* continue */
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/* R_PPC_ADDR16_HI */
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hi16:
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cmpwi r4, R_PPC_ADDR16_HI
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bne ha16
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lwz r4, 0(r9) /* r_offset */
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lwz r0, 8(r9) /* r_addend */
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add r0, r0, r3
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add r0, r0, r5 /* r0 = (S+A+Offset) */
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extrwi r0, r0, 16, 0 /* r0 = (r0 >> 16) */
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b store_half
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/* R_PPC_ADDR16_HA */
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ha16:
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cmpwi r4, R_PPC_ADDR16_HA
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bne lo16
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lwz r4, 0(r9) /* r_offset */
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lwz r0, 8(r9) /* r_addend */
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add r0, r0, r3
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add r0, r0, r5 /* r0 = (S+A+Offset) */
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extrwi r5, r0, 1, 16 /* Extract bit 16 */
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extrwi r0, r0, 16, 0 /* r0 = (r0 >> 16) */
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add r0, r0, r5 /* Add it to r0 */
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b store_half
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/* R_PPC_ADDR16_LO */
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lo16:
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cmpwi r4, R_PPC_ADDR16_LO
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bne unknown_type
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lwz r4, 0(r9) /* r_offset */
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lwz r0, 8(r9) /* r_addend */
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add r0, r0, r3
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add r0, r0, r5 /* r0 = (S+A+Offset) */
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extrwi r0, r0, 16, 16 /* r0 &= 0xffff */
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/* Fall through to */
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/* Store half word */
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store_half:
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sthx r0, r4, r7 /* memory[r4+r7] = (u16)r0 */
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nxtrela:
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/*
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* We have to flush the modified instructions to the
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* main storage from the d-cache. And also, invalidate the
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* cached instructions in i-cache which has been modified.
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*
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* We delay the sync / isync operation till the end, since
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* we won't be executing the modified instructions until
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* we return from here.
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*/
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dcbst r4,r7
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sync /* Ensure the data is flushed before icbi */
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icbi r4,r7
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unknown_type:
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cmpwi r8, 0 /* relasz = 0 ? */
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ble done
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add r9, r9, r6 /* move to next entry in the .rela table */
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subf r8, r6, r8 /* relasz -= relaent */
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b applyrela
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done:
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sync /* Wait for the flush to finish */
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isync /* Discard prefetched instructions */
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blr
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p_dyn: .long __dynamic_start - 0b
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p_rela: .long __rela_dyn_start - 0b
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p_sym: .long __dynamic_symtab - 0b
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p_st: .long _stext - 0b
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