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b099155e2d
Disable the exception handling before booting the kernel to make sure any exceptions that happen during early kernel boot are not directed to the pre-decompression code. Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20210312123824.306-2-joro@8bytes.org
68 lines
1.6 KiB
C
68 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <asm/trap_pf.h>
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#include <asm/segment.h>
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#include <asm/trapnr.h>
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#include "misc.h"
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static void set_idt_entry(int vector, void (*handler)(void))
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{
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unsigned long address = (unsigned long)handler;
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gate_desc entry;
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memset(&entry, 0, sizeof(entry));
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entry.offset_low = (u16)(address & 0xffff);
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entry.segment = __KERNEL_CS;
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entry.bits.type = GATE_TRAP;
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entry.bits.p = 1;
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entry.offset_middle = (u16)((address >> 16) & 0xffff);
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entry.offset_high = (u32)(address >> 32);
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memcpy(&boot_idt[vector], &entry, sizeof(entry));
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}
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/* Have this here so we don't need to include <asm/desc.h> */
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static void load_boot_idt(const struct desc_ptr *dtr)
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{
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asm volatile("lidt %0"::"m" (*dtr));
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}
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/* Setup IDT before kernel jumping to .Lrelocated */
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void load_stage1_idt(void)
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{
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boot_idt_desc.address = (unsigned long)boot_idt;
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if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
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set_idt_entry(X86_TRAP_VC, boot_stage1_vc);
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load_boot_idt(&boot_idt_desc);
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}
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/* Setup IDT after kernel jumping to .Lrelocated */
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void load_stage2_idt(void)
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{
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boot_idt_desc.address = (unsigned long)boot_idt;
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set_idt_entry(X86_TRAP_PF, boot_page_fault);
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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set_idt_entry(X86_TRAP_VC, boot_stage2_vc);
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#endif
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load_boot_idt(&boot_idt_desc);
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}
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void cleanup_exception_handling(void)
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{
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/*
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* Flush GHCB from cache and map it encrypted again when running as
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* SEV-ES guest.
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*/
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sev_es_shutdown_ghcb();
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/* Set a null-idt, disabling #PF and #VC handling */
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boot_idt_desc.size = 0;
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boot_idt_desc.address = 0;
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load_boot_idt(&boot_idt_desc);
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}
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