Jernej Skrabec 0c0ddf0dd6 clk: sunxi-ng: mp: fix parent rate change flag check ... [ Upstream commit 245090ab26 ] CLK_SET_RATE_PARENT flag is checked on parent clock instead of current one. Fix that. Fixes: 3f790433c3 ("clk: sunxi-ng: Adjust MP clock parent rate when allowed") Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Link: https://lore.kernel.org/r/20210209175900.7092-2-jernej.skrabec@siol.net Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-02-17 11:02:28 +01:00
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actions	clk: actions: Add Actions S500 SoC Reset Management Unit support	2020-07-21 01:50:47 -07:00
analogbits
at91	clk: at91: sam9x60: remove atmel,osc-bypass support	2020-12-30 11:54:01 +01:00
axis
axs10x
baikal-t1	clk: baikal-t1: Mark Ethernet PLL as critical	2020-10-13 19:48:34 -07:00
bcm	clk: bcm: dvp: Add MODULE_DEVICE_TABLE()	2020-12-30 11:54:00 +01:00
berlin
davinci	This pull request contains zero diff to the core framework. It is a collection	2020-10-22 12:53:28 -07:00
h8300
hisilicon
imgtec	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
imx	clk: imx: fix Kconfig warning for i.MX SCU clk	2021-02-03 23:28:44 +01:00
ingenic	clk: ingenic: Fix divider calculation with div tables	2020-12-30 11:54:25 +01:00
keystone	clk: keystone: sci-clk: add 10% slack to set_rate	2020-09-22 12:58:52 -07:00
loongson1
mediatek	Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk-mediatek' into clk-next	2020-10-20 11:46:47 -07:00
meson	clk: meson: Kconfig: fix dependency for G12A	2020-12-30 11:53:19 +01:00
microchip
mmp	clk: mmp2: fix build without CONFIG_PM	2021-02-03 23:28:44 +01:00
mvebu	clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9	2020-12-30 11:54:26 +01:00
mxs
nxp
pistachio
pxa	clk: pxa: Constify static struct clk_ops	2020-10-13 19:49:11 -07:00
qcom	clk: qcom: gcc-sm250: Use floor ops for sdcc clks	2021-02-03 23:28:44 +01:00
renesas	clk: renesas: r8a779a0: Fix R and OSC clocks	2020-12-30 11:53:46 +01:00
rockchip	This pull request contains zero diff to the core framework. It is a collection	2020-10-22 12:53:28 -07:00
samsung	ARM: SoC platform updates	2020-10-24 10:33:08 -07:00
sifive	clk: sifive: allocate sufficient memory for struct __prci_data	2020-06-25 15:04:13 -07:00
sirf	clk: clk-prima2: fix return value check in prima2_clk_init()	2020-10-13 19:54:30 -07:00
socfpga	This pull request contains zero diff to the core framework. It is a collection	2020-10-22 12:53:28 -07:00
spear	clk: spear: Remove uninitialized_var() usage	2020-07-16 12:32:26 -07:00
sprd	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
st	clk: st: Remove uninitialized_var() usage	2020-07-16 12:32:25 -07:00
sunxi	clk: sunxi: Fix incorrect usage of round_down()	2020-04-14 09:21:05 +02:00
sunxi-ng	clk: sunxi-ng: mp: fix parent rate change flag check	2021-02-17 11:02:28 +01:00
tegra	clk: tegra30: Add hda clock default rates to clock driver	2021-01-27 11:55:00 +01:00
ti	clk: ti: Fix memleak in ti_fapll_synth_setup	2020-12-30 11:53:58 +01:00
uniphier	clk: uniphier: use semicolons rather than commas to separate statements	2020-10-13 17:43:03 -07:00
ux500
versatile	clk: versatile: Add of_node_put() before return statement	2020-09-10 00:57:42 -07:00
x86	More ACPI updates for 5.9-rc1	2020-08-15 08:18:22 -07:00
zte
zynq
zynqmp	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
clk-asm9260.c	clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo	2020-04-13 12:20:06 -07:00
clk-aspeed.c
clk-aspeed.h
clk-ast2600.c	clk: AST2600: Add mux for EMMC clock	2020-07-11 09:15:33 -07:00
clk-axi-clkgen.c	clk: axi-clkgen: Set power bits for fractional mode	2020-10-13 19:44:40 -07:00
clk-axm5516.c
clk-bd718x7.c
clk-bm1880.c
clk-bulk.c
clk-cdce706.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-cdce925.c
clk-clps711x.c
clk-composite.c	clk: composite: Export clk_hw_register_composite()	2020-08-22 12:38:06 +08:00
clk-conf.c
clk-cs2000-cp.c
clk-devres.c
clk-divider.c
clk-efm32gg.c
clk-fixed-factor.c	clk: fixed: add missing kerneldoc	2020-09-22 12:44:14 -07:00
clk-fixed-mmio.c
clk-fixed-rate.c	clk: fixed: add missing kerneldoc	2020-09-22 12:44:14 -07:00
clk-fractional-divider.c
clk-fsl-sai.c	clk: fsl-sai: fix memory leak	2020-12-30 11:53:42 +01:00
clk-gate.c	treewide: Remove uninitialized_var() usage	2020-07-16 12:35:15 -07:00
clk-gemini.c
clk-gpio.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c	CLK: HSDK: CGU: add support for 148.5MHz clock	2020-05-28 21:06:39 -07:00
clk-lochnagar.c
clk-max9485.c
clk-max77686.c
clk-milbeaut.c
clk-moxart.c
clk-multiplier.c
clk-mux.c
clk-nomadik.c
clk-npcm7xx.c
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-plldig.c
clk-pwm.c	clk: pwm: Use 64-bit division function	2020-06-17 20:42:10 +02:00
clk-qoriq.c	clk: qoriq: modify MAX_PLL_DIV to 32	2020-10-13 19:48:09 -07:00
clk-rk808.c
clk-s2mps11.c	clk: s2mps11: Fix a resource leak in error handling paths in the probe function	2020-12-30 11:54:01 +01:00
clk-scmi.c	clk: scmi: Fix min and max rate when registering clocks with discrete rates	2020-07-13 09:40:21 +01:00
clk-scpi.c
clk-si514.c
clk-si544.c
clk-si570.c
clk-si5341.c	clk: si5341: drop unused 'err' variable	2020-09-22 12:44:41 -07:00
clk-si5351.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-si5351.h
clk-sparx5.c	clk: sparx5: Add Sparx5 SoC DPLL clock driver	2020-07-28 18:17:56 -07:00
clk-stm32f4.c
clk-stm32h7.c
clk-stm32mp1.c
clk-tango4.c
clk-twl6040.c
clk-u300.c
clk-versaclock5.c	clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts"	2020-12-30 11:54:01 +01:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c	treewide: Convert macro and uses of __section(foo) to __section("foo")	2020-10-25 14:51:49 -07:00
clk.h
clkdev.c
Kconfig	Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom', 'clk-prima2' and 'clk-bcm' into clk-next	2020-10-20 11:47:07 -07:00
Makefile	clk: sparx5: Add Sparx5 SoC DPLL clock driver	2020-07-28 18:17:56 -07:00