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cfca4b5abe
The motivation is eventual ABI considerations for ARCv3 but even without
it this change us worthwhile as diffstat reduces 100 net lines
r25 is a callee saved register, normally not saved by entry code in
pt_regs. However because of its usage in CONFIG_ARC_CURR_IN_REG it needs
to be. This in turn requires a whole bunch of special casing when we
need to access r25. Then there is distinction between user mode r25 vs.
kernel mode r25 - hence distinct SAVE_CALLEE_SAVED_{USER,KERNEL}
Instead use gp which is a scratch register and thus saved already in entry
code. This cleans things up significantly and much nocer on eyes:
- SAVE_CALLEE_SAVED_{USER,KERNEL} are now exactly same
- no special user_r25 slot in pt_reggs
Note that typical global asm registers are callee-saved (r25), but gp is
not callee-saved thus needs additional -ffixed-<reg> toggle
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
270 lines
5.8 KiB
C
270 lines
5.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*/
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#ifndef __ASM_ARC_ENTRY_H
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#define __ASM_ARC_ENTRY_H
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#include <asm/unistd.h> /* For NR_syscalls defination */
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#include <asm/arcregs.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h> /* For VMALLOC_START */
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#include <asm/mmu.h>
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#ifdef __ASSEMBLY__
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#ifdef CONFIG_ISA_ARCOMPACT
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#include <asm/entry-compact.h> /* ISA specific bits */
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#else
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#include <asm/entry-arcv2.h>
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#endif
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/* Note on the LD/ST addr modes with addr reg wback
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*
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* LD.a same as LD.aw
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*
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* LD.a reg1, [reg2, x] => Pre Incr
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* Eff Addr for load = [reg2 + x]
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*
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* LD.ab reg1, [reg2, x] => Post Incr
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* Eff Addr for load = [reg2]
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*/
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.macro PUSH reg
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st.a \reg, [sp, -4]
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.endm
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.macro PUSHAX aux
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lr r9, [\aux]
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PUSH r9
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.endm
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.macro POP reg
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ld.ab \reg, [sp, 4]
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.endm
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.macro POPAX aux
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POP r9
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sr r9, [\aux]
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.endm
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/*--------------------------------------------------------------
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* Helpers to save/restore Scratch Regs:
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* used by Interrupt/Exception Prologue/Epilogue
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*-------------------------------------------------------------*/
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.macro SAVE_R0_TO_R12
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PUSH r0
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PUSH r1
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PUSH r2
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PUSH r3
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PUSH r4
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PUSH r5
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PUSH r6
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PUSH r7
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PUSH r8
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PUSH r9
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PUSH r10
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PUSH r11
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PUSH r12
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.endm
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.macro RESTORE_R12_TO_R0
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POP r12
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POP r11
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POP r10
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POP r9
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POP r8
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POP r7
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POP r6
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POP r5
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POP r4
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POP r3
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POP r2
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POP r1
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POP r0
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.endm
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/*--------------------------------------------------------------
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* Helpers to save/restore callee-saved regs:
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* used by several macros below
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*-------------------------------------------------------------*/
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.macro SAVE_R13_TO_R25
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PUSH r13
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PUSH r14
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PUSH r15
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PUSH r16
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PUSH r17
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PUSH r18
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PUSH r19
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PUSH r20
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PUSH r21
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PUSH r22
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PUSH r23
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PUSH r24
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PUSH r25
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.endm
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.macro RESTORE_R25_TO_R13
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POP r25
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POP r24
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POP r23
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POP r22
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POP r21
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POP r20
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POP r19
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POP r18
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POP r17
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POP r16
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POP r15
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POP r14
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POP r13
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.endm
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/*
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* save user mode callee regs as struct callee_regs
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* - needed by fork/do_signal/unaligned-access-emulation.
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*/
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.macro SAVE_CALLEE_SAVED_USER
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SAVE_R13_TO_R25
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.endm
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/*
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* restore user mode callee regs as struct callee_regs
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* - could have been changed by ptrace tracer or unaligned-access fixup
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*/
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.macro RESTORE_CALLEE_SAVED_USER
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RESTORE_R25_TO_R13
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.endm
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/*
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* save/restore kernel mode callee regs at the time of context switch
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*/
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.macro SAVE_CALLEE_SAVED_KERNEL
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SAVE_R13_TO_R25
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.endm
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.macro RESTORE_CALLEE_SAVED_KERNEL
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RESTORE_R25_TO_R13
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.endm
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/*--------------------------------------------------------------
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* Super FAST Restore callee saved regs by simply re-adjusting SP
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*-------------------------------------------------------------*/
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.macro DISCARD_CALLEE_SAVED_USER
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add sp, sp, SZ_CALLEE_REGS
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.endm
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/*-------------------------------------------------------------
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* given a tsk struct, get to the base of it's kernel mode stack
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* tsk->thread_info is really a PAGE, whose bottom hoists stack
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* which grows upwards towards thread_info
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*------------------------------------------------------------*/
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.macro GET_TSK_STACK_BASE tsk, out
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/* Get task->thread_info (this is essentially start of a PAGE) */
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ld \out, [\tsk, TASK_THREAD_INFO]
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/* Go to end of page where stack begins (grows upwards) */
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add2 \out, \out, (THREAD_SIZE)/4
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.endm
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/*
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* @reg [OUT] thread_info->flags of "current"
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*/
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.macro GET_CURR_THR_INFO_FLAGS reg
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GET_CURR_THR_INFO_FROM_SP \reg
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ld \reg, [\reg, THREAD_INFO_FLAGS]
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.endm
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#ifdef CONFIG_SMP
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/*
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* Retrieve the current running task on this CPU
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* - loads it from backing _current_task[] (and can't use the
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* caching reg for current task
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*/
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.macro GET_CURR_TASK_ON_CPU reg
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GET_CPU_ID \reg
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ld.as \reg, [@_current_task, \reg]
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.endm
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/*-------------------------------------------------
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* Save a new task as the "current" task on this CPU
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* 1. Determine curr CPU id.
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* 2. Use it to index into _current_task[ ]
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*
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* Coded differently than GET_CURR_TASK_ON_CPU (which uses LD.AS)
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* because ST r0, [r1, offset] can ONLY have s9 @offset
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* while LD can take s9 (4 byte insn) or LIMM (8 byte insn)
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*/
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.macro SET_CURR_TASK_ON_CPU tsk, tmp
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GET_CPU_ID \tmp
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add2 \tmp, @_current_task, \tmp
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st \tsk, [\tmp]
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#ifdef CONFIG_ARC_CURR_IN_REG
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mov gp, \tsk
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#endif
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.endm
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#else /* Uniprocessor implementation of macros */
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.macro GET_CURR_TASK_ON_CPU reg
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ld \reg, [@_current_task]
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.endm
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.macro SET_CURR_TASK_ON_CPU tsk, tmp
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st \tsk, [@_current_task]
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#ifdef CONFIG_ARC_CURR_IN_REG
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mov gp, \tsk
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#endif
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.endm
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#endif /* SMP / UNI */
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/*
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* Get the ptr to some field of Current Task at @off in task struct
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* - Uses current task cached in reg if enabled
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*/
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#ifdef CONFIG_ARC_CURR_IN_REG
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.macro GET_CURR_TASK_FIELD_PTR off, reg
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add \reg, gp, \off
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.endm
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#else
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.macro GET_CURR_TASK_FIELD_PTR off, reg
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GET_CURR_TASK_ON_CPU \reg
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add \reg, \reg, \off
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.endm
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#endif /* CONFIG_ARC_CURR_IN_REG */
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#else /* !__ASSEMBLY__ */
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extern void do_signal(struct pt_regs *);
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extern void do_notify_resume(struct pt_regs *);
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extern int do_privilege_fault(unsigned long, struct pt_regs *);
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extern int do_extension_fault(unsigned long, struct pt_regs *);
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extern int insterror_is_error(unsigned long, struct pt_regs *);
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extern int do_memory_error(unsigned long, struct pt_regs *);
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extern int trap_is_brkpt(unsigned long, struct pt_regs *);
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extern int do_misaligned_error(unsigned long, struct pt_regs *);
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extern int do_trap5_error(unsigned long, struct pt_regs *);
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extern int do_misaligned_access(unsigned long, struct pt_regs *, struct callee_regs *);
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extern void do_machine_check_fault(unsigned long, struct pt_regs *);
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extern void do_non_swi_trap(unsigned long, struct pt_regs *);
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extern void do_insterror_or_kprobe(unsigned long, struct pt_regs *);
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extern void do_page_fault(unsigned long, struct pt_regs *);
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#endif
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#endif /* __ASM_ARC_ENTRY_H */
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