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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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6a878184c2
Since version 4.1 the gcc is warning about ignored attributes. This patch is
using the equivalent attribute on the struct instead of on each of the
structure or union members.
GCC Manual:
"Specifying Attributes of Types
packed
This attribute, attached to struct or union type definition, specifies
that
each member of the structure or union is placed to minimize the memory
required. When attached to an enum definition, it indicates that the
smallest integral type should be used.
Specifying this attribute for struct and union types is equivalent to
specifying the packed attribute on each of the structure or union
members."
Signed-off-by: Jan Blunck <jblunck@suse.de>
Cc: Dave Jones <davej@codemonkey.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
339 lines
8.9 KiB
C
339 lines
8.9 KiB
C
/*
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* INET An implementation of the TCP/IP protocol suite for the LINUX
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* operating system. INET is implemented using the BSD Socket
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* interface as the means of communication with the user level.
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*
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* Global definitions for the Frame relay interface.
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*
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* Version: @(#)if_ifrad.h 0.20 13 Apr 96
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*
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* Author: Mike McLagan <mike.mclagan@linux.org>
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*
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* Changes:
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* 0.15 Mike McLagan Structure packing
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*
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* 0.20 Mike McLagan New flags for S508 buffer handling
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef SDLA_H
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#define SDLA_H
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/* adapter type */
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#define SDLA_TYPES
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#define SDLA_S502A 5020
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#define SDLA_S502E 5021
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#define SDLA_S503 5030
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#define SDLA_S507 5070
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#define SDLA_S508 5080
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#define SDLA_S509 5090
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#define SDLA_UNKNOWN -1
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/* port selection flags for the S508 */
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#define SDLA_S508_PORT_V35 0x00
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#define SDLA_S508_PORT_RS232 0x02
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/* Z80 CPU speeds */
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#define SDLA_CPU_3M 0x00
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#define SDLA_CPU_5M 0x01
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#define SDLA_CPU_7M 0x02
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#define SDLA_CPU_8M 0x03
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#define SDLA_CPU_10M 0x04
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#define SDLA_CPU_16M 0x05
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#define SDLA_CPU_12M 0x06
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/* some private IOCTLs */
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#define SDLA_IDENTIFY (FRAD_LAST_IOCTL + 1)
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#define SDLA_CPUSPEED (FRAD_LAST_IOCTL + 2)
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#define SDLA_PROTOCOL (FRAD_LAST_IOCTL + 3)
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#define SDLA_CLEARMEM (FRAD_LAST_IOCTL + 4)
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#define SDLA_WRITEMEM (FRAD_LAST_IOCTL + 5)
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#define SDLA_READMEM (FRAD_LAST_IOCTL + 6)
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struct sdla_mem {
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int addr;
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int len;
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void __user *data;
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};
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#define SDLA_START (FRAD_LAST_IOCTL + 7)
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#define SDLA_STOP (FRAD_LAST_IOCTL + 8)
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/* some offsets in the Z80's memory space */
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#define SDLA_NMIADDR 0x0000
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#define SDLA_CONF_ADDR 0x0010
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#define SDLA_S502A_NMIADDR 0x0066
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#define SDLA_CODE_BASEADDR 0x0100
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#define SDLA_WINDOW_SIZE 0x2000
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#define SDLA_ADDR_MASK 0x1FFF
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/* largest handleable block of data */
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#define SDLA_MAX_DATA 4080
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#define SDLA_MAX_MTU 4072 /* MAX_DATA - sizeof(fradhdr) */
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#define SDLA_MAX_DLCI 24
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/* this should be the same as frad_conf */
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struct sdla_conf {
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short station;
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short config;
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short kbaud;
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short clocking;
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short max_frm;
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short T391;
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short T392;
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short N391;
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short N392;
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short N393;
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short CIR_fwd;
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short Bc_fwd;
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short Be_fwd;
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short CIR_bwd;
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short Bc_bwd;
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short Be_bwd;
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};
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/* this should be the same as dlci_conf */
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struct sdla_dlci_conf {
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short config;
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short CIR_fwd;
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short Bc_fwd;
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short Be_fwd;
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short CIR_bwd;
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short Bc_bwd;
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short Be_bwd;
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short Tc_fwd;
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short Tc_bwd;
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short Tf_max;
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short Tb_max;
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};
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#ifndef __KERNEL__
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void sdla(void *cfg_info, char *dev, struct frad_conf *conf, int quiet);
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#else
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/* important Z80 window addresses */
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#define SDLA_CONTROL_WND 0xE000
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#define SDLA_502_CMD_BUF 0xEF60
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#define SDLA_502_RCV_BUF 0xA900
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#define SDLA_502_TXN_AVAIL 0xFFF1
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#define SDLA_502_RCV_AVAIL 0xFFF2
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#define SDLA_502_EVENT_FLAGS 0xFFF3
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#define SDLA_502_MDM_STATUS 0xFFF4
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#define SDLA_502_IRQ_INTERFACE 0xFFFD
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#define SDLA_502_IRQ_PERMISSION 0xFFFE
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#define SDLA_502_DATA_OFS 0x0010
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#define SDLA_508_CMD_BUF 0xE000
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#define SDLA_508_TXBUF_INFO 0xF100
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#define SDLA_508_RXBUF_INFO 0xF120
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#define SDLA_508_EVENT_FLAGS 0xF003
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#define SDLA_508_MDM_STATUS 0xF004
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#define SDLA_508_IRQ_INTERFACE 0xF010
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#define SDLA_508_IRQ_PERMISSION 0xF011
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#define SDLA_508_TSE_OFFSET 0xF012
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/* Event flags */
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#define SDLA_EVENT_STATUS 0x01
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#define SDLA_EVENT_DLCI_STATUS 0x02
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#define SDLA_EVENT_BAD_DLCI 0x04
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#define SDLA_EVENT_LINK_DOWN 0x40
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/* IRQ Trigger flags */
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#define SDLA_INTR_RX 0x01
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#define SDLA_INTR_TX 0x02
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#define SDLA_INTR_MODEM 0x04
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#define SDLA_INTR_COMPLETE 0x08
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#define SDLA_INTR_STATUS 0x10
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#define SDLA_INTR_TIMER 0x20
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/* DLCI status bits */
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#define SDLA_DLCI_DELETED 0x01
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#define SDLA_DLCI_ACTIVE 0x02
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#define SDLA_DLCI_WAITING 0x04
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#define SDLA_DLCI_NEW 0x08
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#define SDLA_DLCI_INCLUDED 0x40
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/* valid command codes */
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#define SDLA_INFORMATION_WRITE 0x01
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#define SDLA_INFORMATION_READ 0x02
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#define SDLA_ISSUE_IN_CHANNEL_SIGNAL 0x03
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#define SDLA_SET_DLCI_CONFIGURATION 0x10
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#define SDLA_READ_DLCI_CONFIGURATION 0x11
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#define SDLA_DISABLE_COMMUNICATIONS 0x12
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#define SDLA_ENABLE_COMMUNICATIONS 0x13
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#define SDLA_READ_DLC_STATUS 0x14
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#define SDLA_READ_DLC_STATISTICS 0x15
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#define SDLA_FLUSH_DLC_STATISTICS 0x16
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#define SDLA_LIST_ACTIVE_DLCI 0x17
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#define SDLA_FLUSH_INFORMATION_BUFFERS 0x18
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#define SDLA_ADD_DLCI 0x20
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#define SDLA_DELETE_DLCI 0x21
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#define SDLA_ACTIVATE_DLCI 0x22
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#define SDLA_DEACTIVATE_DLCI 0x23
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#define SDLA_READ_MODEM_STATUS 0x30
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#define SDLA_SET_MODEM_STATUS 0x31
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#define SDLA_READ_COMMS_ERR_STATS 0x32
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#define SDLA_FLUSH_COMMS_ERR_STATS 0x33
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#define SDLA_READ_CODE_VERSION 0x40
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#define SDLA_SET_IRQ_TRIGGER 0x50
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#define SDLA_GET_IRQ_TRIGGER 0x51
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/* In channel signal types */
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#define SDLA_ICS_LINK_VERIFY 0x02
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#define SDLA_ICS_STATUS_ENQ 0x03
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/* modem status flags */
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#define SDLA_MODEM_DTR_HIGH 0x01
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#define SDLA_MODEM_RTS_HIGH 0x02
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#define SDLA_MODEM_DCD_HIGH 0x08
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#define SDLA_MODEM_CTS_HIGH 0x20
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/* used for RET_MODEM interpretation */
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#define SDLA_MODEM_DCD_LOW 0x01
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#define SDLA_MODEM_CTS_LOW 0x02
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/* return codes */
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#define SDLA_RET_OK 0x00
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#define SDLA_RET_COMMUNICATIONS 0x01
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#define SDLA_RET_CHANNEL_INACTIVE 0x02
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#define SDLA_RET_DLCI_INACTIVE 0x03
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#define SDLA_RET_DLCI_CONFIG 0x04
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#define SDLA_RET_BUF_TOO_BIG 0x05
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#define SDLA_RET_NO_DATA 0x05
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#define SDLA_RET_BUF_OVERSIZE 0x06
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#define SDLA_RET_CIR_OVERFLOW 0x07
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#define SDLA_RET_NO_BUFS 0x08
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#define SDLA_RET_TIMEOUT 0x0A
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#define SDLA_RET_MODEM 0x10
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#define SDLA_RET_CHANNEL_OFF 0x11
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#define SDLA_RET_CHANNEL_ON 0x12
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#define SDLA_RET_DLCI_STATUS 0x13
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#define SDLA_RET_DLCI_UNKNOWN 0x14
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#define SDLA_RET_COMMAND_INVALID 0x1F
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/* Configuration flags */
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#define SDLA_DIRECT_RECV 0x0080
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#define SDLA_TX_NO_EXCEPT 0x0020
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#define SDLA_NO_ICF_MSGS 0x1000
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#define SDLA_TX50_RX50 0x0000
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#define SDLA_TX70_RX30 0x2000
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#define SDLA_TX30_RX70 0x4000
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/* IRQ selection flags */
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#define SDLA_IRQ_RECEIVE 0x01
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#define SDLA_IRQ_TRANSMIT 0x02
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#define SDLA_IRQ_MODEM_STAT 0x04
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#define SDLA_IRQ_COMMAND 0x08
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#define SDLA_IRQ_CHANNEL 0x10
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#define SDLA_IRQ_TIMER 0x20
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/* definitions for PC memory mapping */
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#define SDLA_8K_WINDOW 0x01
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#define SDLA_S502_SEG_A 0x10
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#define SDLA_S502_SEG_C 0x20
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#define SDLA_S502_SEG_D 0x00
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#define SDLA_S502_SEG_E 0x30
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#define SDLA_S507_SEG_A 0x00
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#define SDLA_S507_SEG_B 0x40
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#define SDLA_S507_SEG_C 0x80
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#define SDLA_S507_SEG_E 0xC0
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#define SDLA_S508_SEG_A 0x00
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#define SDLA_S508_SEG_C 0x10
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#define SDLA_S508_SEG_D 0x08
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#define SDLA_S508_SEG_E 0x18
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/* SDLA adapter port constants */
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#define SDLA_IO_EXTENTS 0x04
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#define SDLA_REG_CONTROL 0x00
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#define SDLA_REG_PC_WINDOW 0x01 /* offset for PC window select latch */
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#define SDLA_REG_Z80_WINDOW 0x02 /* offset for Z80 window select latch */
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#define SDLA_REG_Z80_CONTROL 0x03 /* offset for Z80 control latch */
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#define SDLA_S502_STS 0x00 /* status reg for 502, 502E, 507 */
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#define SDLA_S508_GNRL 0x00 /* general purp. reg for 508 */
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#define SDLA_S508_STS 0x01 /* status reg for 508 */
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#define SDLA_S508_IDR 0x02 /* ID reg for 508 */
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/* control register flags */
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#define SDLA_S502A_START 0x00 /* start the CPU */
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#define SDLA_S502A_INTREQ 0x02
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#define SDLA_S502A_INTEN 0x04
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#define SDLA_S502A_HALT 0x08 /* halt the CPU */
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#define SDLA_S502A_NMI 0x10 /* issue an NMI to the CPU */
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#define SDLA_S502E_CPUEN 0x01
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#define SDLA_S502E_ENABLE 0x02
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#define SDLA_S502E_INTACK 0x04
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#define SDLA_S507_ENABLE 0x01
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#define SDLA_S507_IRQ3 0x00
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#define SDLA_S507_IRQ4 0x20
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#define SDLA_S507_IRQ5 0x40
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#define SDLA_S507_IRQ7 0x60
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#define SDLA_S507_IRQ10 0x80
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#define SDLA_S507_IRQ11 0xA0
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#define SDLA_S507_IRQ12 0xC0
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#define SDLA_S507_IRQ15 0xE0
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#define SDLA_HALT 0x00
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#define SDLA_CPUEN 0x02
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#define SDLA_MEMEN 0x04
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#define SDLA_S507_EPROMWR 0x08
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#define SDLA_S507_EPROMCLK 0x10
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#define SDLA_S508_INTRQ 0x08
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#define SDLA_S508_INTEN 0x10
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struct sdla_cmd {
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char opp_flag;
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char cmd;
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short length;
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char retval;
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short dlci;
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char flags;
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short rxlost_int;
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long rxlost_app;
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char reserve[2];
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char data[SDLA_MAX_DATA]; /* transfer data buffer */
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} __attribute__((packed));
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struct intr_info {
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char flags;
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short txlen;
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char irq;
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char flags2;
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short timeout;
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} __attribute__((packed));
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/* found in the 508's control window at RXBUF_INFO */
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struct buf_info {
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unsigned short rse_num;
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unsigned long rse_base;
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unsigned long rse_next;
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unsigned long buf_base;
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unsigned short reserved;
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unsigned long buf_top;
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} __attribute__((packed));
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/* structure pointed to by rse_base in RXBUF_INFO struct */
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struct buf_entry {
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char opp_flag;
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short length;
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short dlci;
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char flags;
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short timestamp;
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short reserved[2];
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long buf_addr;
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} __attribute__((packed));
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#endif
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#endif
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