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2b74c1f6ef
mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220922091841.4099-4-miles.chen@mediatek.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
60 lines
1.4 KiB
C
60 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018 MediaTek Inc.
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* Author: Owen Chen <owen.chen@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt6765-clk.h>
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static const struct mtk_gate_regs venc_cg_regs = {
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.set_ofs = 0x4,
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.clr_ofs = 0x8,
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.sta_ofs = 0x0,
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};
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#define GATE_VENC(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &venc_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr_inv, \
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}
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static const struct mtk_gate venc_clks[] = {
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GATE_VENC(CLK_VENC_SET0_LARB, "venc_set0_larb", "mm_ck", 0),
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GATE_VENC(CLK_VENC_SET1_VENC, "venc_set1_venc", "mm_ck", 4),
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GATE_VENC(CLK_VENC_SET2_JPGENC, "jpgenc", "mm_ck", 8),
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GATE_VENC(CLK_VENC_SET3_VDEC, "venc_set3_vdec", "mm_ck", 12),
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};
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static const struct mtk_clk_desc venc_desc = {
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.clks = venc_clks,
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.num_clks = ARRAY_SIZE(venc_clks),
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};
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static const struct of_device_id of_match_clk_mt6765_vcodec[] = {
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{
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.compatible = "mediatek,mt6765-vcodecsys",
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.data = &venc_desc,
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}, {
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/* sentinel */
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}
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};
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static struct platform_driver clk_mt6765_vcodec_drv = {
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt6765-vcodec",
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.of_match_table = of_match_clk_mt6765_vcodec,
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},
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};
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builtin_platform_driver(clk_mt6765_vcodec_drv);
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