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1bc9597271
The HDMI block has a block that controls clocks and reset signals to the HDMI0 and HDMI1 controllers. Let's expose that through a clock driver implementing a clock and reset provider. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/bb60d97fc76b61c2eabef5a02ebd664c0f57ede0.1591867332.git-series.maxime@cerno.tech Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
18 lines
839 B
Makefile
18 lines
839 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_CLK_BCM_63XX) += clk-bcm63xx.o
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obj-$(CONFIG_CLK_BCM_63XX_GATE) += clk-bcm63xx-gate.o
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obj-$(CONFIG_CLK_BCM_KONA) += clk-kona.o
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obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o
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obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
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obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
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obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
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obj-$(CONFIG_CLK_BCM2711_DVP) += clk-bcm2711-dvp.o
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obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835.o
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obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835-aux.o
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obj-$(CONFIG_CLK_RASPBERRYPI) += clk-raspberrypi.o
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obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o
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obj-$(CONFIG_CLK_BCM_CYGNUS) += clk-cygnus.o
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obj-$(CONFIG_CLK_BCM_HR2) += clk-hr2.o
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obj-$(CONFIG_CLK_BCM_NSP) += clk-nsp.o
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obj-$(CONFIG_CLK_BCM_NS2) += clk-ns2.o
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obj-$(CONFIG_CLK_BCM_SR) += clk-sr.o
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