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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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![Michał Mirosław](/assets/img/avatar_default.png)
Note: looks like bnad->conf_mutex is duplicating rtnl_lock. Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: David S. Miller <davem@davemloft.net>
337 lines
7.6 KiB
C
337 lines
7.6 KiB
C
/*
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* Linux network driver for Brocade Converged Network Adapter.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License (GPL) Version 2 as
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* published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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/*
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* Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
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* All rights reserved
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* www.brocade.com
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*/
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#ifndef __BNAD_H__
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#define __BNAD_H__
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#include <linux/rtnetlink.h>
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#include <linux/workqueue.h>
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#include <linux/ipv6.h>
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#include <linux/etherdevice.h>
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#include <linux/mutex.h>
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#include <linux/firmware.h>
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/* Fix for IA64 */
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#include <asm/checksum.h>
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#include <net/ip6_checksum.h>
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#include <net/ip.h>
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#include <net/tcp.h>
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#include "bna.h"
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#define BNAD_TXQ_DEPTH 2048
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#define BNAD_RXQ_DEPTH 2048
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#define BNAD_MAX_TXS 1
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#define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */
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#define BNAD_TXQ_NUM 1
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#define BNAD_MAX_RXS 1
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#define BNAD_MAX_RXPS_PER_RX 16
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/*
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* Control structure pointed to ccb->ctrl, which
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* determines the NAPI / LRO behavior CCB
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* There is 1:1 corres. between ccb & ctrl
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*/
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struct bnad_rx_ctrl {
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struct bna_ccb *ccb;
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unsigned long flags;
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struct napi_struct napi;
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};
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#define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC
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#define BNAD_GET_TX_ID(_skb) (0)
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/*
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* GLOBAL #defines (CONSTANTS)
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*/
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#define BNAD_NAME "bna"
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#define BNAD_NAME_LEN 64
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#define BNAD_VERSION "2.3.2.3"
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#define BNAD_MAILBOX_MSIX_VECTORS 1
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#define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */
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#define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */
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#define BNAD_MAX_Q_DEPTH 0x10000
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#define BNAD_MIN_Q_DEPTH 0x200
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#define BNAD_JUMBO_MTU 9000
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#define BNAD_NETIF_WAKE_THRESHOLD 8
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#define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
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/* Bit positions for tcb->flags */
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#define BNAD_TXQ_FREE_SENT 0
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#define BNAD_TXQ_TX_STARTED 1
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/* Bit positions for rcb->flags */
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#define BNAD_RXQ_REFILL 0
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#define BNAD_RXQ_STARTED 1
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/*
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* DATA STRUCTURES
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*/
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/* enums */
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enum bnad_intr_source {
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BNAD_INTR_TX = 1,
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BNAD_INTR_RX = 2
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};
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enum bnad_link_state {
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BNAD_LS_DOWN = 0,
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BNAD_LS_UP = 1
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};
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struct bnad_completion {
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struct completion ioc_comp;
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struct completion ucast_comp;
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struct completion mcast_comp;
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struct completion tx_comp;
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struct completion rx_comp;
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struct completion stats_comp;
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struct completion port_comp;
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u8 ioc_comp_status;
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u8 ucast_comp_status;
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u8 mcast_comp_status;
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u8 tx_comp_status;
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u8 rx_comp_status;
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u8 stats_comp_status;
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u8 port_comp_status;
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};
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/* Tx Rx Control Stats */
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struct bnad_drv_stats {
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u64 netif_queue_stop;
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u64 netif_queue_wakeup;
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u64 netif_queue_stopped;
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u64 tso4;
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u64 tso6;
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u64 tso_err;
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u64 tcpcsum_offload;
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u64 udpcsum_offload;
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u64 csum_help;
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u64 csum_help_err;
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u64 hw_stats_updates;
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u64 netif_rx_schedule;
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u64 netif_rx_complete;
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u64 netif_rx_dropped;
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u64 link_toggle;
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u64 cee_up;
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u64 rxp_info_alloc_failed;
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u64 mbox_intr_disabled;
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u64 mbox_intr_enabled;
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u64 tx_unmap_q_alloc_failed;
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u64 rx_unmap_q_alloc_failed;
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u64 rxbuf_alloc_failed;
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};
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/* Complete driver stats */
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struct bnad_stats {
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struct bnad_drv_stats drv_stats;
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struct bna_stats *bna_stats;
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};
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/* Tx / Rx Resources */
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struct bnad_tx_res_info {
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struct bna_res_info res_info[BNA_TX_RES_T_MAX];
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};
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struct bnad_rx_res_info {
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struct bna_res_info res_info[BNA_RX_RES_T_MAX];
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};
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struct bnad_tx_info {
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struct bna_tx *tx; /* 1:1 between tx_info & tx */
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struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
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} ____cacheline_aligned;
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struct bnad_rx_info {
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struct bna_rx *rx; /* 1:1 between rx_info & rx */
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struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXPS_PER_RX];
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} ____cacheline_aligned;
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/* Unmap queues for Tx / Rx cleanup */
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struct bnad_skb_unmap {
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struct sk_buff *skb;
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DEFINE_DMA_UNMAP_ADDR(dma_addr);
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};
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struct bnad_unmap_q {
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u32 producer_index;
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u32 consumer_index;
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u32 q_depth;
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/* This should be the last one */
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struct bnad_skb_unmap unmap_array[1];
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};
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/* Bit mask values for bnad->cfg_flags */
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#define BNAD_CF_DIM_ENABLED 0x01 /* DIM */
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#define BNAD_CF_PROMISC 0x02
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#define BNAD_CF_ALLMULTI 0x04
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#define BNAD_CF_MSIX 0x08 /* If in MSIx mode */
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/* Defines for run_flags bit-mask */
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/* Set, tested & cleared using xxx_bit() functions */
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/* Values indicated bit positions */
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#define BNAD_RF_CEE_RUNNING 1
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#define BNAD_RF_MBOX_IRQ_DISABLED 2
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#define BNAD_RF_RX_STARTED 3
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#define BNAD_RF_DIM_TIMER_RUNNING 4
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#define BNAD_RF_STATS_TIMER_RUNNING 5
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#define BNAD_RF_TX_SHUTDOWN_DELAYED 6
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#define BNAD_RF_RX_SHUTDOWN_DELAYED 7
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struct bnad {
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struct net_device *netdev;
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/* Data path */
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struct bnad_tx_info tx_info[BNAD_MAX_TXS];
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struct bnad_rx_info rx_info[BNAD_MAX_RXS];
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struct vlan_group *vlan_grp;
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/*
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* These q numbers are global only because
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* they are used to calculate MSIx vectors.
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* Actually the exact # of queues are per Tx/Rx
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* object.
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*/
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u32 num_tx;
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u32 num_rx;
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u32 num_txq_per_tx;
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u32 num_rxp_per_rx;
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u32 txq_depth;
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u32 rxq_depth;
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u8 tx_coalescing_timeo;
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u8 rx_coalescing_timeo;
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struct bna_rx_config rx_config[BNAD_MAX_RXS];
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struct bna_tx_config tx_config[BNAD_MAX_TXS];
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void __iomem *bar0; /* BAR0 address */
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struct bna bna;
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u32 cfg_flags;
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unsigned long run_flags;
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struct pci_dev *pcidev;
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u64 mmio_start;
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u64 mmio_len;
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u32 msix_num;
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struct msix_entry *msix_table;
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struct mutex conf_mutex;
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spinlock_t bna_lock ____cacheline_aligned;
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/* Timers */
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struct timer_list ioc_timer;
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struct timer_list dim_timer;
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struct timer_list stats_timer;
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/* Control path resources, memory & irq */
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struct bna_res_info res_info[BNA_RES_T_MAX];
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struct bnad_tx_res_info tx_res_info[BNAD_MAX_TXS];
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struct bnad_rx_res_info rx_res_info[BNAD_MAX_RXS];
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struct bnad_completion bnad_completions;
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/* Burnt in MAC address */
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mac_t perm_addr;
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struct tasklet_struct tx_free_tasklet;
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/* Statistics */
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struct bnad_stats stats;
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struct bnad_diag *diag;
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char adapter_name[BNAD_NAME_LEN];
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char port_name[BNAD_NAME_LEN];
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char mbox_irq_name[BNAD_NAME_LEN];
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};
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/*
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* EXTERN VARIABLES
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*/
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extern struct firmware *bfi_fw;
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extern u32 bnad_rxqs_per_cq;
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/*
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* EXTERN PROTOTYPES
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*/
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extern u32 *cna_get_firmware_buf(struct pci_dev *pdev);
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/* Netdev entry point prototypes */
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extern void bnad_set_ethtool_ops(struct net_device *netdev);
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/* Configuration & setup */
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extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
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extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
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extern int bnad_setup_rx(struct bnad *bnad, uint rx_id);
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extern int bnad_setup_tx(struct bnad *bnad, uint tx_id);
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extern void bnad_cleanup_tx(struct bnad *bnad, uint tx_id);
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extern void bnad_cleanup_rx(struct bnad *bnad, uint rx_id);
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/* Timer start/stop protos */
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extern void bnad_dim_timer_start(struct bnad *bnad);
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/* Statistics */
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extern void bnad_netdev_qstats_fill(struct bnad *bnad,
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struct rtnl_link_stats64 *stats);
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extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
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struct rtnl_link_stats64 *stats);
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/**
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* MACROS
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*/
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/* To set & get the stats counters */
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#define BNAD_UPDATE_CTR(_bnad, _ctr) \
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(((_bnad)->stats.drv_stats._ctr)++)
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#define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
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#define bnad_enable_rx_irq_unsafe(_ccb) \
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{ \
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if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))) {\
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bna_ib_coalescing_timer_set((_ccb)->i_dbell, \
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(_ccb)->rx_coalescing_timeo); \
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bna_ib_ack((_ccb)->i_dbell, 0); \
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} \
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}
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#define bnad_dim_timer_running(_bnad) \
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(((_bnad)->cfg_flags & BNAD_CF_DIM_ENABLED) && \
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(test_bit(BNAD_RF_DIM_TIMER_RUNNING, &((_bnad)->run_flags))))
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#endif /* __BNAD_H__ */
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