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![Eric Dumazet](/assets/img/avatar_default.png)
Now that core network takes care of trans_start updates, dont do it in drivers themselves, if possible. Drivers can avoid one cache miss (on dev->trans_start) in their start_xmit() handler. Exceptions are NETIF_F_LLTX drivers Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
836 lines
20 KiB
C
836 lines
20 KiB
C
/*
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* Alchemy Semi Au1000 IrDA driver
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*
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* Copyright 2001 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/netdevice.h>
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#include <linux/slab.h>
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#include <linux/rtnetlink.h>
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#include <linux/interrupt.h>
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#include <linux/pm.h>
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#include <linux/bitops.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/au1000.h>
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#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100)
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#include <asm/pb1000.h>
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#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
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#include <asm/db1x00.h>
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#include <asm/mach-db1x00/bcsr.h>
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#else
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#error au1k_ir: unsupported board
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#endif
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#include <net/irda/irda.h>
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#include <net/irda/irmod.h>
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#include <net/irda/wrapper.h>
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#include <net/irda/irda_device.h>
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#include "au1000_ircc.h"
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static int au1k_irda_net_init(struct net_device *);
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static int au1k_irda_start(struct net_device *);
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static int au1k_irda_stop(struct net_device *dev);
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static int au1k_irda_hard_xmit(struct sk_buff *, struct net_device *);
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static int au1k_irda_rx(struct net_device *);
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static void au1k_irda_interrupt(int, void *);
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static void au1k_tx_timeout(struct net_device *);
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static int au1k_irda_ioctl(struct net_device *, struct ifreq *, int);
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static int au1k_irda_set_speed(struct net_device *dev, int speed);
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static void *dma_alloc(size_t, dma_addr_t *);
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static void dma_free(void *, size_t);
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static int qos_mtt_bits = 0x07; /* 1 ms or more */
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static struct net_device *ir_devs[NUM_IR_IFF];
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static char version[] __devinitdata =
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"au1k_ircc:1.2 ppopov@mvista.com\n";
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#define RUN_AT(x) (jiffies + (x))
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static DEFINE_SPINLOCK(ir_lock);
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/*
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* IrDA peripheral bug. You have to read the register
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* twice to get the right value.
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*/
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u32 read_ir_reg(u32 addr)
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{
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readl(addr);
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return readl(addr);
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}
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/*
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* Buffer allocation/deallocation routines. The buffer descriptor returned
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* has the virtual and dma address of a buffer suitable for
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* both, receive and transmit operations.
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*/
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static db_dest_t *GetFreeDB(struct au1k_private *aup)
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{
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db_dest_t *pDB;
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pDB = aup->pDBfree;
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if (pDB) {
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aup->pDBfree = pDB->pnext;
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}
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return pDB;
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}
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static void ReleaseDB(struct au1k_private *aup, db_dest_t *pDB)
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{
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db_dest_t *pDBfree = aup->pDBfree;
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if (pDBfree)
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pDBfree->pnext = pDB;
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aup->pDBfree = pDB;
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}
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/*
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DMA memory allocation, derived from pci_alloc_consistent.
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However, the Au1000 data cache is coherent (when programmed
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so), therefore we return KSEG0 address, not KSEG1.
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*/
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static void *dma_alloc(size_t size, dma_addr_t * dma_handle)
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{
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void *ret;
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int gfp = GFP_ATOMIC | GFP_DMA;
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ret = (void *) __get_free_pages(gfp, get_order(size));
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if (ret != NULL) {
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memset(ret, 0, size);
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*dma_handle = virt_to_bus(ret);
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ret = (void *)KSEG0ADDR(ret);
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}
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return ret;
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}
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static void dma_free(void *vaddr, size_t size)
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{
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vaddr = (void *)KSEG0ADDR(vaddr);
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free_pages((unsigned long) vaddr, get_order(size));
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}
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static void
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setup_hw_rings(struct au1k_private *aup, u32 rx_base, u32 tx_base)
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{
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int i;
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for (i=0; i<NUM_IR_DESC; i++) {
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aup->rx_ring[i] = (volatile ring_dest_t *)
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(rx_base + sizeof(ring_dest_t)*i);
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}
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for (i=0; i<NUM_IR_DESC; i++) {
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aup->tx_ring[i] = (volatile ring_dest_t *)
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(tx_base + sizeof(ring_dest_t)*i);
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}
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}
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static int au1k_irda_init(void)
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{
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static unsigned version_printed = 0;
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struct au1k_private *aup;
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struct net_device *dev;
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int err;
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if (version_printed++ == 0) printk(version);
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dev = alloc_irdadev(sizeof(struct au1k_private));
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if (!dev)
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return -ENOMEM;
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dev->irq = AU1000_IRDA_RX_INT; /* TX has its own interrupt */
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err = au1k_irda_net_init(dev);
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if (err)
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goto out;
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err = register_netdev(dev);
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if (err)
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goto out1;
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ir_devs[0] = dev;
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printk(KERN_INFO "IrDA: Registered device %s\n", dev->name);
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return 0;
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out1:
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aup = netdev_priv(dev);
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dma_free((void *)aup->db[0].vaddr,
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MAX_BUF_SIZE * 2*NUM_IR_DESC);
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dma_free((void *)aup->rx_ring[0],
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2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
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kfree(aup->rx_buff.head);
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out:
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free_netdev(dev);
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return err;
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}
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static int au1k_irda_init_iobuf(iobuff_t *io, int size)
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{
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io->head = kmalloc(size, GFP_KERNEL);
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if (io->head != NULL) {
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io->truesize = size;
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io->in_frame = FALSE;
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io->state = OUTSIDE_FRAME;
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io->data = io->head;
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}
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return io->head ? 0 : -ENOMEM;
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}
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static const struct net_device_ops au1k_irda_netdev_ops = {
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.ndo_open = au1k_irda_start,
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.ndo_stop = au1k_irda_stop,
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.ndo_start_xmit = au1k_irda_hard_xmit,
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.ndo_tx_timeout = au1k_tx_timeout,
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.ndo_do_ioctl = au1k_irda_ioctl,
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};
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static int au1k_irda_net_init(struct net_device *dev)
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{
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struct au1k_private *aup = netdev_priv(dev);
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int i, retval = 0, err;
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db_dest_t *pDB, *pDBfree;
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dma_addr_t temp;
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err = au1k_irda_init_iobuf(&aup->rx_buff, 14384);
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if (err)
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goto out1;
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dev->netdev_ops = &au1k_irda_netdev_ops;
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irda_init_max_qos_capabilies(&aup->qos);
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/* The only value we must override it the baudrate */
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aup->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
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IR_115200|IR_576000 |(IR_4000000 << 8);
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aup->qos.min_turn_time.bits = qos_mtt_bits;
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irda_qos_bits_to_value(&aup->qos);
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retval = -ENOMEM;
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/* Tx ring follows rx ring + 512 bytes */
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/* we need a 1k aligned buffer */
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aup->rx_ring[0] = (ring_dest_t *)
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dma_alloc(2*MAX_NUM_IR_DESC*(sizeof(ring_dest_t)), &temp);
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if (!aup->rx_ring[0])
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goto out2;
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/* allocate the data buffers */
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aup->db[0].vaddr =
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(void *)dma_alloc(MAX_BUF_SIZE * 2*NUM_IR_DESC, &temp);
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if (!aup->db[0].vaddr)
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goto out3;
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setup_hw_rings(aup, (u32)aup->rx_ring[0], (u32)aup->rx_ring[0] + 512);
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pDBfree = NULL;
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pDB = aup->db;
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for (i=0; i<(2*NUM_IR_DESC); i++) {
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pDB->pnext = pDBfree;
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pDBfree = pDB;
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pDB->vaddr =
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(u32 *)((unsigned)aup->db[0].vaddr + MAX_BUF_SIZE*i);
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pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
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pDB++;
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}
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aup->pDBfree = pDBfree;
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/* attach a data buffer to each descriptor */
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for (i=0; i<NUM_IR_DESC; i++) {
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pDB = GetFreeDB(aup);
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if (!pDB) goto out;
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aup->rx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
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aup->rx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
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aup->rx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
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aup->rx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
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aup->rx_db_inuse[i] = pDB;
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}
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for (i=0; i<NUM_IR_DESC; i++) {
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pDB = GetFreeDB(aup);
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if (!pDB) goto out;
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aup->tx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
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aup->tx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
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aup->tx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
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aup->tx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
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aup->tx_ring[i]->count_0 = 0;
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aup->tx_ring[i]->count_1 = 0;
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aup->tx_ring[i]->flags = 0;
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aup->tx_db_inuse[i] = pDB;
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}
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#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
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/* power on */
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bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
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BCSR_RESETS_IRDA_MODE_FULL);
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#endif
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return 0;
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out3:
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dma_free((void *)aup->rx_ring[0],
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2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
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out2:
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kfree(aup->rx_buff.head);
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out1:
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printk(KERN_ERR "au1k_init_module failed. Returns %d\n", retval);
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return retval;
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}
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static int au1k_init(struct net_device *dev)
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{
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struct au1k_private *aup = netdev_priv(dev);
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int i;
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u32 control;
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u32 ring_address;
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/* bring the device out of reset */
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control = 0xe; /* coherent, clock enable, one half system clock */
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#ifndef CONFIG_CPU_LITTLE_ENDIAN
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control |= 1;
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#endif
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aup->tx_head = 0;
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aup->tx_tail = 0;
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aup->rx_head = 0;
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for (i=0; i<NUM_IR_DESC; i++) {
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aup->rx_ring[i]->flags = AU_OWN;
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}
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writel(control, IR_INTERFACE_CONFIG);
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au_sync_delay(10);
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writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); /* disable PHY */
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au_sync_delay(1);
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writel(MAX_BUF_SIZE, IR_MAX_PKT_LEN);
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ring_address = (u32)virt_to_phys((void *)aup->rx_ring[0]);
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writel(ring_address >> 26, IR_RING_BASE_ADDR_H);
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writel((ring_address >> 10) & 0xffff, IR_RING_BASE_ADDR_L);
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writel(RING_SIZE_64<<8 | RING_SIZE_64<<12, IR_RING_SIZE);
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writel(1<<2 | IR_ONE_PIN, IR_CONFIG_2); /* 48MHz */
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writel(0, IR_RING_ADDR_CMPR);
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au1k_irda_set_speed(dev, 9600);
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return 0;
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}
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static int au1k_irda_start(struct net_device *dev)
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{
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int retval;
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char hwname[32];
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struct au1k_private *aup = netdev_priv(dev);
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if ((retval = au1k_init(dev))) {
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printk(KERN_ERR "%s: error in au1k_init\n", dev->name);
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return retval;
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}
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if ((retval = request_irq(AU1000_IRDA_TX_INT, au1k_irda_interrupt,
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0, dev->name, dev))) {
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printk(KERN_ERR "%s: unable to get IRQ %d\n",
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dev->name, dev->irq);
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return retval;
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}
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if ((retval = request_irq(AU1000_IRDA_RX_INT, au1k_irda_interrupt,
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0, dev->name, dev))) {
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free_irq(AU1000_IRDA_TX_INT, dev);
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printk(KERN_ERR "%s: unable to get IRQ %d\n",
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dev->name, dev->irq);
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return retval;
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}
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/* Give self a hardware name */
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sprintf(hwname, "Au1000 SIR/FIR");
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aup->irlap = irlap_open(dev, &aup->qos, hwname);
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netif_start_queue(dev);
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writel(read_ir_reg(IR_CONFIG_2) | 1<<8, IR_CONFIG_2); /* int enable */
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aup->timer.expires = RUN_AT((3*HZ));
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aup->timer.data = (unsigned long)dev;
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return 0;
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}
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static int au1k_irda_stop(struct net_device *dev)
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{
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struct au1k_private *aup = netdev_priv(dev);
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/* disable interrupts */
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writel(read_ir_reg(IR_CONFIG_2) & ~(1<<8), IR_CONFIG_2);
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writel(0, IR_CONFIG_1);
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writel(0, IR_INTERFACE_CONFIG); /* disable clock */
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au_sync();
|
|
|
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if (aup->irlap) {
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irlap_close(aup->irlap);
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aup->irlap = NULL;
|
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}
|
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|
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netif_stop_queue(dev);
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del_timer(&aup->timer);
|
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|
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/* disable the interrupt */
|
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free_irq(AU1000_IRDA_TX_INT, dev);
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free_irq(AU1000_IRDA_RX_INT, dev);
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return 0;
|
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}
|
|
|
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static void __exit au1k_irda_exit(void)
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{
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struct net_device *dev = ir_devs[0];
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struct au1k_private *aup = netdev_priv(dev);
|
|
|
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unregister_netdev(dev);
|
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|
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dma_free((void *)aup->db[0].vaddr,
|
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MAX_BUF_SIZE * 2*NUM_IR_DESC);
|
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dma_free((void *)aup->rx_ring[0],
|
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2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
|
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kfree(aup->rx_buff.head);
|
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free_netdev(dev);
|
|
}
|
|
|
|
|
|
static inline void
|
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update_tx_stats(struct net_device *dev, u32 status, u32 pkt_len)
|
|
{
|
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struct au1k_private *aup = netdev_priv(dev);
|
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struct net_device_stats *ps = &aup->stats;
|
|
|
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ps->tx_packets++;
|
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ps->tx_bytes += pkt_len;
|
|
|
|
if (status & IR_TX_ERROR) {
|
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ps->tx_errors++;
|
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ps->tx_aborted_errors++;
|
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}
|
|
}
|
|
|
|
|
|
static void au1k_tx_ack(struct net_device *dev)
|
|
{
|
|
struct au1k_private *aup = netdev_priv(dev);
|
|
volatile ring_dest_t *ptxd;
|
|
|
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ptxd = aup->tx_ring[aup->tx_tail];
|
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while (!(ptxd->flags & AU_OWN) && (aup->tx_tail != aup->tx_head)) {
|
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update_tx_stats(dev, ptxd->flags,
|
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ptxd->count_1<<8 | ptxd->count_0);
|
|
ptxd->count_0 = 0;
|
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ptxd->count_1 = 0;
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au_sync();
|
|
|
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aup->tx_tail = (aup->tx_tail + 1) & (NUM_IR_DESC - 1);
|
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ptxd = aup->tx_ring[aup->tx_tail];
|
|
|
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if (aup->tx_full) {
|
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aup->tx_full = 0;
|
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netif_wake_queue(dev);
|
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}
|
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}
|
|
|
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if (aup->tx_tail == aup->tx_head) {
|
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if (aup->newspeed) {
|
|
au1k_irda_set_speed(dev, aup->newspeed);
|
|
aup->newspeed = 0;
|
|
}
|
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else {
|
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writel(read_ir_reg(IR_CONFIG_1) & ~IR_TX_ENABLE,
|
|
IR_CONFIG_1);
|
|
au_sync();
|
|
writel(read_ir_reg(IR_CONFIG_1) | IR_RX_ENABLE,
|
|
IR_CONFIG_1);
|
|
writel(0, IR_RING_PROMPT);
|
|
au_sync();
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
* Au1000 transmit routine.
|
|
*/
|
|
static int au1k_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
{
|
|
struct au1k_private *aup = netdev_priv(dev);
|
|
int speed = irda_get_next_speed(skb);
|
|
volatile ring_dest_t *ptxd;
|
|
u32 len;
|
|
|
|
u32 flags;
|
|
db_dest_t *pDB;
|
|
|
|
if (speed != aup->speed && speed != -1) {
|
|
aup->newspeed = speed;
|
|
}
|
|
|
|
if ((skb->len == 0) && (aup->newspeed)) {
|
|
if (aup->tx_tail == aup->tx_head) {
|
|
au1k_irda_set_speed(dev, speed);
|
|
aup->newspeed = 0;
|
|
}
|
|
dev_kfree_skb(skb);
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
ptxd = aup->tx_ring[aup->tx_head];
|
|
flags = ptxd->flags;
|
|
|
|
if (flags & AU_OWN) {
|
|
printk(KERN_DEBUG "%s: tx_full\n", dev->name);
|
|
netif_stop_queue(dev);
|
|
aup->tx_full = 1;
|
|
return NETDEV_TX_BUSY;
|
|
}
|
|
else if (((aup->tx_head + 1) & (NUM_IR_DESC - 1)) == aup->tx_tail) {
|
|
printk(KERN_DEBUG "%s: tx_full\n", dev->name);
|
|
netif_stop_queue(dev);
|
|
aup->tx_full = 1;
|
|
return NETDEV_TX_BUSY;
|
|
}
|
|
|
|
pDB = aup->tx_db_inuse[aup->tx_head];
|
|
|
|
#if 0
|
|
if (read_ir_reg(IR_RX_BYTE_CNT) != 0) {
|
|
printk("tx warning: rx byte cnt %x\n",
|
|
read_ir_reg(IR_RX_BYTE_CNT));
|
|
}
|
|
#endif
|
|
|
|
if (aup->speed == 4000000) {
|
|
/* FIR */
|
|
skb_copy_from_linear_data(skb, pDB->vaddr, skb->len);
|
|
ptxd->count_0 = skb->len & 0xff;
|
|
ptxd->count_1 = (skb->len >> 8) & 0xff;
|
|
|
|
}
|
|
else {
|
|
/* SIR */
|
|
len = async_wrap_skb(skb, (u8 *)pDB->vaddr, MAX_BUF_SIZE);
|
|
ptxd->count_0 = len & 0xff;
|
|
ptxd->count_1 = (len >> 8) & 0xff;
|
|
ptxd->flags |= IR_DIS_CRC;
|
|
au_writel(au_readl(0xae00000c) & ~(1<<13), 0xae00000c);
|
|
}
|
|
ptxd->flags |= AU_OWN;
|
|
au_sync();
|
|
|
|
writel(read_ir_reg(IR_CONFIG_1) | IR_TX_ENABLE, IR_CONFIG_1);
|
|
writel(0, IR_RING_PROMPT);
|
|
au_sync();
|
|
|
|
dev_kfree_skb(skb);
|
|
aup->tx_head = (aup->tx_head + 1) & (NUM_IR_DESC - 1);
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
|
|
static inline void
|
|
update_rx_stats(struct net_device *dev, u32 status, u32 count)
|
|
{
|
|
struct au1k_private *aup = netdev_priv(dev);
|
|
struct net_device_stats *ps = &aup->stats;
|
|
|
|
ps->rx_packets++;
|
|
|
|
if (status & IR_RX_ERROR) {
|
|
ps->rx_errors++;
|
|
if (status & (IR_PHY_ERROR|IR_FIFO_OVER))
|
|
ps->rx_missed_errors++;
|
|
if (status & IR_MAX_LEN)
|
|
ps->rx_length_errors++;
|
|
if (status & IR_CRC_ERROR)
|
|
ps->rx_crc_errors++;
|
|
}
|
|
else
|
|
ps->rx_bytes += count;
|
|
}
|
|
|
|
/*
|
|
* Au1000 receive routine.
|
|
*/
|
|
static int au1k_irda_rx(struct net_device *dev)
|
|
{
|
|
struct au1k_private *aup = netdev_priv(dev);
|
|
struct sk_buff *skb;
|
|
volatile ring_dest_t *prxd;
|
|
u32 flags, count;
|
|
db_dest_t *pDB;
|
|
|
|
prxd = aup->rx_ring[aup->rx_head];
|
|
flags = prxd->flags;
|
|
|
|
while (!(flags & AU_OWN)) {
|
|
pDB = aup->rx_db_inuse[aup->rx_head];
|
|
count = prxd->count_1<<8 | prxd->count_0;
|
|
if (!(flags & IR_RX_ERROR)) {
|
|
/* good frame */
|
|
update_rx_stats(dev, flags, count);
|
|
skb=alloc_skb(count+1,GFP_ATOMIC);
|
|
if (skb == NULL) {
|
|
aup->netdev->stats.rx_dropped++;
|
|
continue;
|
|
}
|
|
skb_reserve(skb, 1);
|
|
if (aup->speed == 4000000)
|
|
skb_put(skb, count);
|
|
else
|
|
skb_put(skb, count-2);
|
|
skb_copy_to_linear_data(skb, pDB->vaddr, count - 2);
|
|
skb->dev = dev;
|
|
skb_reset_mac_header(skb);
|
|
skb->protocol = htons(ETH_P_IRDA);
|
|
netif_rx(skb);
|
|
prxd->count_0 = 0;
|
|
prxd->count_1 = 0;
|
|
}
|
|
prxd->flags |= AU_OWN;
|
|
aup->rx_head = (aup->rx_head + 1) & (NUM_IR_DESC - 1);
|
|
writel(0, IR_RING_PROMPT);
|
|
au_sync();
|
|
|
|
/* next descriptor */
|
|
prxd = aup->rx_ring[aup->rx_head];
|
|
flags = prxd->flags;
|
|
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
static irqreturn_t au1k_irda_interrupt(int dummy, void *dev_id)
|
|
{
|
|
struct net_device *dev = dev_id;
|
|
|
|
writel(0, IR_INT_CLEAR); /* ack irda interrupts */
|
|
|
|
au1k_irda_rx(dev);
|
|
au1k_tx_ack(dev);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
|
|
/*
|
|
* The Tx ring has been full longer than the watchdog timeout
|
|
* value. The transmitter must be hung?
|
|
*/
|
|
static void au1k_tx_timeout(struct net_device *dev)
|
|
{
|
|
u32 speed;
|
|
struct au1k_private *aup = netdev_priv(dev);
|
|
|
|
printk(KERN_ERR "%s: tx timeout\n", dev->name);
|
|
speed = aup->speed;
|
|
aup->speed = 0;
|
|
au1k_irda_set_speed(dev, speed);
|
|
aup->tx_full = 0;
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
|
|
/*
|
|
* Set the IrDA communications speed.
|
|
*/
|
|
static int
|
|
au1k_irda_set_speed(struct net_device *dev, int speed)
|
|
{
|
|
unsigned long flags;
|
|
struct au1k_private *aup = netdev_priv(dev);
|
|
u32 control;
|
|
int ret = 0, timeout = 10, i;
|
|
volatile ring_dest_t *ptxd;
|
|
#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
|
|
unsigned long irda_resets;
|
|
#endif
|
|
|
|
if (speed == aup->speed)
|
|
return ret;
|
|
|
|
spin_lock_irqsave(&ir_lock, flags);
|
|
|
|
/* disable PHY first */
|
|
writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE);
|
|
|
|
/* disable RX/TX */
|
|
writel(read_ir_reg(IR_CONFIG_1) & ~(IR_RX_ENABLE|IR_TX_ENABLE),
|
|
IR_CONFIG_1);
|
|
au_sync_delay(1);
|
|
while (read_ir_reg(IR_ENABLE) & (IR_RX_STATUS | IR_TX_STATUS)) {
|
|
mdelay(1);
|
|
if (!timeout--) {
|
|
printk(KERN_ERR "%s: rx/tx disable timeout\n",
|
|
dev->name);
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* disable DMA */
|
|
writel(read_ir_reg(IR_CONFIG_1) & ~IR_DMA_ENABLE, IR_CONFIG_1);
|
|
au_sync_delay(1);
|
|
|
|
/*
|
|
* After we disable tx/rx. the index pointers
|
|
* go back to zero.
|
|
*/
|
|
aup->tx_head = aup->tx_tail = aup->rx_head = 0;
|
|
for (i=0; i<NUM_IR_DESC; i++) {
|
|
ptxd = aup->tx_ring[i];
|
|
ptxd->flags = 0;
|
|
ptxd->count_0 = 0;
|
|
ptxd->count_1 = 0;
|
|
}
|
|
|
|
for (i=0; i<NUM_IR_DESC; i++) {
|
|
ptxd = aup->rx_ring[i];
|
|
ptxd->count_0 = 0;
|
|
ptxd->count_1 = 0;
|
|
ptxd->flags = AU_OWN;
|
|
}
|
|
|
|
if (speed == 4000000) {
|
|
#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
|
|
bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_FIR_SEL);
|
|
#else /* Pb1000 and Pb1100 */
|
|
writel(1<<13, CPLD_AUX1);
|
|
#endif
|
|
}
|
|
else {
|
|
#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
|
|
bcsr_mod(BCSR_RESETS, BCSR_RESETS_FIR_SEL, 0);
|
|
#else /* Pb1000 and Pb1100 */
|
|
writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1);
|
|
#endif
|
|
}
|
|
|
|
switch (speed) {
|
|
case 9600:
|
|
writel(11<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
|
|
writel(IR_SIR_MODE, IR_CONFIG_1);
|
|
break;
|
|
case 19200:
|
|
writel(5<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
|
|
writel(IR_SIR_MODE, IR_CONFIG_1);
|
|
break;
|
|
case 38400:
|
|
writel(2<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
|
|
writel(IR_SIR_MODE, IR_CONFIG_1);
|
|
break;
|
|
case 57600:
|
|
writel(1<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
|
|
writel(IR_SIR_MODE, IR_CONFIG_1);
|
|
break;
|
|
case 115200:
|
|
writel(12<<5, IR_WRITE_PHY_CONFIG);
|
|
writel(IR_SIR_MODE, IR_CONFIG_1);
|
|
break;
|
|
case 4000000:
|
|
writel(0xF, IR_WRITE_PHY_CONFIG);
|
|
writel(IR_FIR|IR_DMA_ENABLE|IR_RX_ENABLE, IR_CONFIG_1);
|
|
break;
|
|
default:
|
|
printk(KERN_ERR "%s unsupported speed %x\n", dev->name, speed);
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
aup->speed = speed;
|
|
writel(read_ir_reg(IR_ENABLE) | 0x8000, IR_ENABLE);
|
|
au_sync();
|
|
|
|
control = read_ir_reg(IR_ENABLE);
|
|
writel(0, IR_RING_PROMPT);
|
|
au_sync();
|
|
|
|
if (control & (1<<14)) {
|
|
printk(KERN_ERR "%s: configuration error\n", dev->name);
|
|
}
|
|
else {
|
|
if (control & (1<<11))
|
|
printk(KERN_DEBUG "%s Valid SIR config\n", dev->name);
|
|
if (control & (1<<12))
|
|
printk(KERN_DEBUG "%s Valid MIR config\n", dev->name);
|
|
if (control & (1<<13))
|
|
printk(KERN_DEBUG "%s Valid FIR config\n", dev->name);
|
|
if (control & (1<<10))
|
|
printk(KERN_DEBUG "%s TX enabled\n", dev->name);
|
|
if (control & (1<<9))
|
|
printk(KERN_DEBUG "%s RX enabled\n", dev->name);
|
|
}
|
|
|
|
spin_unlock_irqrestore(&ir_lock, flags);
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
au1k_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
|
|
{
|
|
struct if_irda_req *rq = (struct if_irda_req *)ifreq;
|
|
struct au1k_private *aup = netdev_priv(dev);
|
|
int ret = -EOPNOTSUPP;
|
|
|
|
switch (cmd) {
|
|
case SIOCSBANDWIDTH:
|
|
if (capable(CAP_NET_ADMIN)) {
|
|
/*
|
|
* We are unable to set the speed if the
|
|
* device is not running.
|
|
*/
|
|
if (aup->open)
|
|
ret = au1k_irda_set_speed(dev,
|
|
rq->ifr_baudrate);
|
|
else {
|
|
printk(KERN_ERR "%s ioctl: !netif_running\n",
|
|
dev->name);
|
|
ret = 0;
|
|
}
|
|
}
|
|
break;
|
|
|
|
case SIOCSMEDIABUSY:
|
|
ret = -EPERM;
|
|
if (capable(CAP_NET_ADMIN)) {
|
|
irda_device_set_media_busy(dev, TRUE);
|
|
ret = 0;
|
|
}
|
|
break;
|
|
|
|
case SIOCGRECEIVING:
|
|
rq->ifr_receiving = 0;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
MODULE_AUTHOR("Pete Popov <ppopov@mvista.com>");
|
|
MODULE_DESCRIPTION("Au1000 IrDA Device Driver");
|
|
|
|
module_init(au1k_irda_init);
|
|
module_exit(au1k_irda_exit);
|