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![Samuel Holland](/assets/img/avatar_default.png)
The RTC power domain in sun6i and newer SoCs manages the 16 MHz RC oscillator (called "IOSC" or "osc16M") and the optional 32 kHz crystal oscillator (called "LOSC" or "osc32k"). Starting with the H6, this power domain also handles the 24 MHz DCXO (called variously "HOSC", "dcxo24M", or "osc24M") as well. The H6 also adds a calibration circuit for IOSC. Later SoCs introduce further variations on the design: - H616 adds an additional mux for the 32 kHz fanout source. - R329 adds an additional mux for the RTC timekeeping clock, a clock for the SPI bus between power domains inside the RTC, and removes the IOSC calibration functionality. Take advantage of the CCU framework to handle this increased complexity. This driver is intended to be a drop-in replacement for the existing RTC clock provider. So some runtime adjustment of the clock parents is needed, both to handle hardware differences, and to support the old binding which omitted some of the input clocks. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220203021736.13434-6-samuel@sholland.org
14 lines
364 B
C
14 lines
364 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
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*/
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#ifndef _LINUX_CLK_SUNXI_NG_H_
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#define _LINUX_CLK_SUNXI_NG_H_
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int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode);
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int sunxi_ccu_get_mmc_timing_mode(struct clk *clk);
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int sun6i_rtc_ccu_probe(struct device *dev, void __iomem *reg);
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#endif
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