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dacce2be33
Vmxnet3 version 3 device supports checksum/TSO offload. Thus, vNIC to pNIC traffic can leverage hardware checksum/TSO offloads. However, vmxnet3 does not support checksum/TSO offload for Geneve/VXLAN encapsulated packets. Thus, for a vNIC configured with an overlay, the guest stack must first segment the inner packet, compute the inner checksum for each segment and encapsulate each segment before transmitting the packet via the vNIC. This results in significant performance penalty. This patch will enhance vmxnet3 to support Geneve/VXLAN TSO as well as checksum offload. Signed-off-by: Ronak Doshi <doshir@vmware.com> Signed-off-by: David S. Miller <davem@davemloft.net>
99 lines
2.8 KiB
C
99 lines
2.8 KiB
C
/*
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* Linux driver for VMware's vmxnet3 ethernet NIC.
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*
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* Copyright (C) 2008-2020, VMware, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License and no later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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* Maintained by: pv-drivers@vmware.com
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*
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*/
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#ifndef _UPT1_DEFS_H
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#define _UPT1_DEFS_H
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struct UPT1_TxStats {
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u64 TSOPktsTxOK; /* TSO pkts post-segmentation */
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u64 TSOBytesTxOK;
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u64 ucastPktsTxOK;
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u64 ucastBytesTxOK;
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u64 mcastPktsTxOK;
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u64 mcastBytesTxOK;
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u64 bcastPktsTxOK;
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u64 bcastBytesTxOK;
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u64 pktsTxError;
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u64 pktsTxDiscard;
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};
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struct UPT1_RxStats {
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u64 LROPktsRxOK; /* LRO pkts */
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u64 LROBytesRxOK; /* bytes from LRO pkts */
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/* the following counters are for pkts from the wire, i.e., pre-LRO */
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u64 ucastPktsRxOK;
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u64 ucastBytesRxOK;
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u64 mcastPktsRxOK;
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u64 mcastBytesRxOK;
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u64 bcastPktsRxOK;
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u64 bcastBytesRxOK;
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u64 pktsRxOutOfBuf;
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u64 pktsRxError;
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};
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/* interrupt moderation level */
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enum {
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UPT1_IML_NONE = 0, /* no interrupt moderation */
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UPT1_IML_HIGHEST = 7, /* least intr generated */
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UPT1_IML_ADAPTIVE = 8, /* adpative intr moderation */
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};
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/* values for UPT1_RSSConf.hashFunc */
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enum {
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UPT1_RSS_HASH_TYPE_NONE = 0x0,
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UPT1_RSS_HASH_TYPE_IPV4 = 0x01,
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UPT1_RSS_HASH_TYPE_TCP_IPV4 = 0x02,
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UPT1_RSS_HASH_TYPE_IPV6 = 0x04,
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UPT1_RSS_HASH_TYPE_TCP_IPV6 = 0x08,
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};
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enum {
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UPT1_RSS_HASH_FUNC_NONE = 0x0,
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UPT1_RSS_HASH_FUNC_TOEPLITZ = 0x01,
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};
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#define UPT1_RSS_MAX_KEY_SIZE 40
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#define UPT1_RSS_MAX_IND_TABLE_SIZE 128
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struct UPT1_RSSConf {
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u16 hashType;
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u16 hashFunc;
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u16 hashKeySize;
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u16 indTableSize;
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u8 hashKey[UPT1_RSS_MAX_KEY_SIZE];
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u8 indTable[UPT1_RSS_MAX_IND_TABLE_SIZE];
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};
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/* features */
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enum {
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UPT1_F_RXCSUM = cpu_to_le64(0x0001), /* rx csum verification */
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UPT1_F_RSS = cpu_to_le64(0x0002),
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UPT1_F_RXVLAN = cpu_to_le64(0x0004), /* VLAN tag stripping */
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UPT1_F_LRO = cpu_to_le64(0x0008),
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UPT1_F_RXINNEROFLD = cpu_to_le64(0x00010), /* Geneve/Vxlan rx csum
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* offloading
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*/
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};
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#endif
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