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567cf94dc7
The SMP release mechanism for FSL book3e is different from when booting with normal hardware. In theory we could simulate the normal spin table mechanism, but not at the addresses U-Boot put in the device tree -- so there'd need to be even more communication between the kernel and kexec to set that up. Instead, kexec-tools will set a boolean property linux,booted-from-kexec in the /chosen node. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: devicetree@vger.kernel.org
54 lines
1.6 KiB
Text
54 lines
1.6 KiB
Text
The chosen node
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---------------
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The chosen node does not represent a real device, but serves as a place
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for passing data between firmware and the operating system, like boot
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arguments. Data in the chosen node does not represent the hardware.
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stdout-path property
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--------------------
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Device trees may specify the device to be used for boot console output
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with a stdout-path property under /chosen, as described in ePAPR, e.g.
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/ {
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chosen {
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stdout-path = "/serial@f00:115200";
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};
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serial@f00 {
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compatible = "vendor,some-uart";
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reg = <0xf00 0x10>;
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};
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};
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If the character ":" is present in the value, this terminates the path.
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The meaning of any characters following the ":" is device-specific, and
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must be specified in the relevant binding documentation.
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For UART devices, the preferred binding is a string in the form:
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<baud>{<parity>{<bits>{<flow>}}}
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where
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baud - baud rate in decimal
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parity - 'n' (none), 'o', (odd) or 'e' (even)
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bits - number of data bits
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flow - 'r' (rts)
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For example: 115200n8r
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Implementation note: Linux will look for the property "linux,stdout-path" or
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on PowerPC "stdout" if "stdout-path" is not found. However, the
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"linux,stdout-path" and "stdout" properties are deprecated. New platforms
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should only use the "stdout-path" property.
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linux,booted-from-kexec
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-----------------------
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This property is set (currently only on PowerPC, and only needed on
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book3e) by some versions of kexec-tools to tell the new kernel that it
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is being booted by kexec, as the booting environment may differ (e.g.
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a different secondary CPU release mechanism)
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