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bea8bcb12d
Add support for the Coldfire 5441x (54410/54415/54416/54417/54418). Currently we only support noMMU mode. It requires the PIT patch posted previously as it uses the PIT instead of the dma timer as a clock source so we can get all that GENERIC_CLOCKEVENTS goodness. It also adds some simple clk definitions and very simple minded power management. The gpio code is tweeked and some additional devices are added to devices.c. The Makefile uses -mv4e as apparently, the only difference a v4m (m5441x) and a v4e is the later has a FPU, which I don't think should matter to us in the kernel. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
43 lines
812 B
C
43 lines
812 B
C
/*
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* mcfclk.h -- coldfire specific clock structure
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*/
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#ifndef mcfclk_h
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#define mcfclk_h
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struct clk;
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#ifdef MCFPM_PPMCR0
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struct clk_ops {
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void (*enable)(struct clk *);
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void (*disable)(struct clk *);
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};
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struct clk {
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const char *name;
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struct clk_ops *clk_ops;
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unsigned long rate;
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unsigned long enabled;
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u8 slot;
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};
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extern struct clk *mcf_clks[];
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extern struct clk_ops clk_ops0;
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#ifdef MCFPM_PPMCR1
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extern struct clk_ops clk_ops1;
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#endif /* MCFPM_PPMCR1 */
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#define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \
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static struct clk __clk_##clk_bank##_##clk_slot = { \
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.name = clk_name, \
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.clk_ops = &clk_ops##clk_bank, \
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.rate = clk_rate, \
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.slot = clk_slot, \
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}
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void __clk_init_enabled(struct clk *);
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void __clk_init_disabled(struct clk *);
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#endif /* MCFPM_PPMCR0 */
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#endif /* mcfclk_h */
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