mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-13 22:25:03 +00:00
faf654864b
With the code motion mostly done, convert all the uC code away from uint??_t at once (only a couple dozen variables), so that reading the checkpatch.pl output should actually pinpoint if a new uint??_t was accidentally introduced. v2: - Include intel_uc_fw.h too (Sagar) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171006084940.15910-1-joonas.lahtinen@linux.intel.com
110 lines
3.4 KiB
C
110 lines
3.4 KiB
C
/*
|
|
* Copyright © 2014-2017 Intel Corporation
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice (including the next
|
|
* paragraph) shall be included in all copies or substantial portions of the
|
|
* Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
|
* IN THE SOFTWARE.
|
|
*
|
|
*/
|
|
|
|
#ifndef _INTEL_GUC_H_
|
|
#define _INTEL_GUC_H_
|
|
|
|
#include "intel_uncore.h"
|
|
#include "intel_guc_fwif.h"
|
|
#include "intel_guc_ct.h"
|
|
#include "intel_guc_log.h"
|
|
#include "intel_uc_fw.h"
|
|
#include "i915_guc_reg.h"
|
|
#include "i915_vma.h"
|
|
|
|
struct intel_guc {
|
|
struct intel_uc_fw fw;
|
|
struct intel_guc_log log;
|
|
struct intel_guc_ct ct;
|
|
|
|
/* Log snapshot if GuC errors during load */
|
|
struct drm_i915_gem_object *load_err_log;
|
|
|
|
/* intel_guc_recv interrupt related state */
|
|
bool interrupts_enabled;
|
|
|
|
struct i915_vma *ads_vma;
|
|
struct i915_vma *stage_desc_pool;
|
|
void *stage_desc_pool_vaddr;
|
|
struct ida stage_ids;
|
|
|
|
struct i915_guc_client *execbuf_client;
|
|
|
|
DECLARE_BITMAP(doorbell_bitmap, GUC_NUM_DOORBELLS);
|
|
/* Cyclic counter mod pagesize */
|
|
u32 db_cacheline;
|
|
|
|
/* GuC's FW specific registers used in MMIO send */
|
|
struct {
|
|
u32 base;
|
|
unsigned int count;
|
|
enum forcewake_domains fw_domains;
|
|
} send_regs;
|
|
|
|
/* To serialize the intel_guc_send actions */
|
|
struct mutex send_mutex;
|
|
|
|
/* GuC's FW specific send function */
|
|
int (*send)(struct intel_guc *guc, const u32 *data, u32 len);
|
|
|
|
/* GuC's FW specific notify function */
|
|
void (*notify)(struct intel_guc *guc);
|
|
};
|
|
|
|
static
|
|
inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len)
|
|
{
|
|
return guc->send(guc, action, len);
|
|
}
|
|
|
|
static inline void intel_guc_notify(struct intel_guc *guc)
|
|
{
|
|
guc->notify(guc);
|
|
}
|
|
|
|
static inline u32 guc_ggtt_offset(struct i915_vma *vma)
|
|
{
|
|
u32 offset = i915_ggtt_offset(vma);
|
|
|
|
GEM_BUG_ON(offset < GUC_WOPCM_TOP);
|
|
GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
|
|
|
|
return offset;
|
|
}
|
|
|
|
void intel_guc_init_early(struct intel_guc *guc);
|
|
void intel_guc_init_send_regs(struct intel_guc *guc);
|
|
int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len);
|
|
int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len);
|
|
int intel_guc_sample_forcewake(struct intel_guc *guc);
|
|
int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
|
|
int intel_guc_suspend(struct drm_i915_private *dev_priv);
|
|
int intel_guc_resume(struct drm_i915_private *dev_priv);
|
|
struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
|
|
|
|
int intel_guc_select_fw(struct intel_guc *guc);
|
|
int intel_guc_init_hw(struct intel_guc *guc);
|
|
u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
|
|
|
|
#endif
|