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![Igor M. Liplianin](/assets/img/avatar_default.png)
[mchehab@redhat.com: Fix a merge conflict] Signed-off-by: Igor M. Liplianin <liplianin@netup.ru> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
1021 lines
22 KiB
C
1021 lines
22 KiB
C
/*
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* altera-jtag.c
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*
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* altera FPGA driver
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*
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* Copyright (C) Altera Corporation 1998-2001
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* Copyright (C) 2010 NetUP Inc.
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* Copyright (C) 2010 Igor M. Liplianin <liplianin@netup.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/delay.h>
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#include <linux/firmware.h>
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#include <linux/slab.h>
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#include <misc/altera.h>
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#include "altera-exprt.h"
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#include "altera-jtag.h"
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#define alt_jtag_io(a, b, c)\
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astate->config->jtag_io(astate->config->dev, a, b, c);
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#define alt_malloc(a) kzalloc(a, GFP_KERNEL);
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/*
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* This structure shows, for each JTAG state, which state is reached after
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* a single TCK clock cycle with TMS high or TMS low, respectively. This
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* describes all possible state transitions in the JTAG state machine.
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*/
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struct altera_jtag_machine {
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enum altera_jtag_state tms_high;
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enum altera_jtag_state tms_low;
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};
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static const struct altera_jtag_machine altera_transitions[] = {
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/* RESET */ { RESET, IDLE },
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/* IDLE */ { DRSELECT, IDLE },
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/* DRSELECT */ { IRSELECT, DRCAPTURE },
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/* DRCAPTURE */ { DREXIT1, DRSHIFT },
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/* DRSHIFT */ { DREXIT1, DRSHIFT },
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/* DREXIT1 */ { DRUPDATE, DRPAUSE },
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/* DRPAUSE */ { DREXIT2, DRPAUSE },
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/* DREXIT2 */ { DRUPDATE, DRSHIFT },
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/* DRUPDATE */ { DRSELECT, IDLE },
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/* IRSELECT */ { RESET, IRCAPTURE },
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/* IRCAPTURE */ { IREXIT1, IRSHIFT },
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/* IRSHIFT */ { IREXIT1, IRSHIFT },
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/* IREXIT1 */ { IRUPDATE, IRPAUSE },
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/* IRPAUSE */ { IREXIT2, IRPAUSE },
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/* IREXIT2 */ { IRUPDATE, IRSHIFT },
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/* IRUPDATE */ { DRSELECT, IDLE }
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};
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/*
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* This table contains the TMS value to be used to take the NEXT STEP on
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* the path to the desired state. The array index is the current state,
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* and the bit position is the desired endstate. To find out which state
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* is used as the intermediate state, look up the TMS value in the
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* altera_transitions[] table.
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*/
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static const u16 altera_jtag_path_map[16] = {
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/* RST RTI SDRS CDR SDR E1DR PDR E2DR */
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0x0001, 0xFFFD, 0xFE01, 0xFFE7, 0xFFEF, 0xFF0F, 0xFFBF, 0xFFFF,
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/* UDR SIRS CIR SIR E1IR PIR E2IR UIR */
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0xFEFD, 0x0001, 0xF3FF, 0xF7FF, 0x87FF, 0xDFFF, 0xFFFF, 0x7FFD
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};
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/* Flag bits for alt_jtag_io() function */
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#define TMS_HIGH 1
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#define TMS_LOW 0
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#define TDI_HIGH 1
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#define TDI_LOW 0
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#define READ_TDO 1
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#define IGNORE_TDO 0
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int altera_jinit(struct altera_state *astate)
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{
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struct altera_jtag *js = &astate->js;
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/* initial JTAG state is unknown */
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js->jtag_state = ILLEGAL_JTAG_STATE;
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/* initialize to default state */
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js->drstop_state = IDLE;
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js->irstop_state = IDLE;
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js->dr_pre = 0;
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js->dr_post = 0;
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js->ir_pre = 0;
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js->ir_post = 0;
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js->dr_length = 0;
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js->ir_length = 0;
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js->dr_pre_data = NULL;
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js->dr_post_data = NULL;
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js->ir_pre_data = NULL;
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js->ir_post_data = NULL;
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js->dr_buffer = NULL;
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js->ir_buffer = NULL;
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return 0;
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}
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int altera_set_drstop(struct altera_jtag *js, enum altera_jtag_state state)
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{
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js->drstop_state = state;
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return 0;
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}
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int altera_set_irstop(struct altera_jtag *js, enum altera_jtag_state state)
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{
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js->irstop_state = state;
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return 0;
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}
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int altera_set_dr_pre(struct altera_jtag *js,
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u32 count, u32 start_index,
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u8 *preamble_data)
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{
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int status = 0;
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u32 i;
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u32 j;
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if (count > js->dr_pre) {
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kfree(js->dr_pre_data);
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js->dr_pre_data = (u8 *)alt_malloc((count + 7) >> 3);
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if (js->dr_pre_data == NULL)
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status = -ENOMEM;
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else
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js->dr_pre = count;
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} else
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js->dr_pre = count;
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if (status == 0) {
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for (i = 0; i < count; ++i) {
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j = i + start_index;
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if (preamble_data == NULL)
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js->dr_pre_data[i >> 3] |= (1 << (i & 7));
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else {
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if (preamble_data[j >> 3] & (1 << (j & 7)))
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js->dr_pre_data[i >> 3] |=
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(1 << (i & 7));
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else
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js->dr_pre_data[i >> 3] &=
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~(u32)(1 << (i & 7));
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}
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}
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}
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return status;
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}
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int altera_set_ir_pre(struct altera_jtag *js, u32 count, u32 start_index,
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u8 *preamble_data)
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{
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int status = 0;
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u32 i;
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u32 j;
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if (count > js->ir_pre) {
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kfree(js->ir_pre_data);
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js->ir_pre_data = (u8 *)alt_malloc((count + 7) >> 3);
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if (js->ir_pre_data == NULL)
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status = -ENOMEM;
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else
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js->ir_pre = count;
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} else
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js->ir_pre = count;
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if (status == 0) {
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for (i = 0; i < count; ++i) {
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j = i + start_index;
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if (preamble_data == NULL)
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js->ir_pre_data[i >> 3] |= (1 << (i & 7));
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else {
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if (preamble_data[j >> 3] & (1 << (j & 7)))
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js->ir_pre_data[i >> 3] |=
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(1 << (i & 7));
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else
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js->ir_pre_data[i >> 3] &=
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~(u32)(1 << (i & 7));
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}
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}
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}
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return status;
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}
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int altera_set_dr_post(struct altera_jtag *js, u32 count, u32 start_index,
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u8 *postamble_data)
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{
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int status = 0;
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u32 i;
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u32 j;
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if (count > js->dr_post) {
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kfree(js->dr_post_data);
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js->dr_post_data = (u8 *)alt_malloc((count + 7) >> 3);
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if (js->dr_post_data == NULL)
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status = -ENOMEM;
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else
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js->dr_post = count;
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} else
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js->dr_post = count;
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if (status == 0) {
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for (i = 0; i < count; ++i) {
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j = i + start_index;
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if (postamble_data == NULL)
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js->dr_post_data[i >> 3] |= (1 << (i & 7));
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else {
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if (postamble_data[j >> 3] & (1 << (j & 7)))
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js->dr_post_data[i >> 3] |=
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(1 << (i & 7));
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else
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js->dr_post_data[i >> 3] &=
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~(u32)(1 << (i & 7));
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}
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}
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}
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return status;
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}
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int altera_set_ir_post(struct altera_jtag *js, u32 count, u32 start_index,
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u8 *postamble_data)
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{
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int status = 0;
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u32 i;
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u32 j;
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if (count > js->ir_post) {
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kfree(js->ir_post_data);
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js->ir_post_data = (u8 *)alt_malloc((count + 7) >> 3);
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if (js->ir_post_data == NULL)
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status = -ENOMEM;
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else
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js->ir_post = count;
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} else
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js->ir_post = count;
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if (status != 0)
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return status;
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for (i = 0; i < count; ++i) {
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j = i + start_index;
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if (postamble_data == NULL)
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js->ir_post_data[i >> 3] |= (1 << (i & 7));
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else {
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if (postamble_data[j >> 3] & (1 << (j & 7)))
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js->ir_post_data[i >> 3] |= (1 << (i & 7));
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else
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js->ir_post_data[i >> 3] &=
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~(u32)(1 << (i & 7));
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}
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}
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return status;
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}
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static void altera_jreset_idle(struct altera_state *astate)
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{
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struct altera_jtag *js = &astate->js;
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int i;
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/* Go to Test Logic Reset (no matter what the starting state may be) */
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for (i = 0; i < 5; ++i)
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alt_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
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/* Now step to Run Test / Idle */
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alt_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
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js->jtag_state = IDLE;
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}
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int altera_goto_jstate(struct altera_state *astate,
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enum altera_jtag_state state)
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{
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struct altera_jtag *js = &astate->js;
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int tms;
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int count = 0;
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int status = 0;
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if (js->jtag_state == ILLEGAL_JTAG_STATE)
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/* initialize JTAG chain to known state */
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altera_jreset_idle(astate);
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if (js->jtag_state == state) {
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/*
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* We are already in the desired state.
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* If it is a stable state, loop here.
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* Otherwise do nothing (no clock cycles).
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*/
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if ((state == IDLE) || (state == DRSHIFT) ||
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(state == DRPAUSE) || (state == IRSHIFT) ||
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(state == IRPAUSE)) {
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alt_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
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} else if (state == RESET)
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alt_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
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} else {
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while ((js->jtag_state != state) && (count < 9)) {
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/* Get TMS value to take a step toward desired state */
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tms = (altera_jtag_path_map[js->jtag_state] &
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(1 << state))
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? TMS_HIGH : TMS_LOW;
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/* Take a step */
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alt_jtag_io(tms, TDI_LOW, IGNORE_TDO);
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if (tms)
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js->jtag_state =
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altera_transitions[js->jtag_state].tms_high;
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else
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js->jtag_state =
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altera_transitions[js->jtag_state].tms_low;
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++count;
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}
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}
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if (js->jtag_state != state)
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status = -EREMOTEIO;
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return status;
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}
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int altera_wait_cycles(struct altera_state *astate,
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s32 cycles,
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enum altera_jtag_state wait_state)
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{
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struct altera_jtag *js = &astate->js;
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int tms;
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s32 count;
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int status = 0;
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if (js->jtag_state != wait_state)
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status = altera_goto_jstate(astate, wait_state);
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if (status == 0) {
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/*
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* Set TMS high to loop in RESET state
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* Set TMS low to loop in any other stable state
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*/
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tms = (wait_state == RESET) ? TMS_HIGH : TMS_LOW;
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for (count = 0L; count < cycles; count++)
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alt_jtag_io(tms, TDI_LOW, IGNORE_TDO);
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}
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return status;
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}
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int altera_wait_msecs(struct altera_state *astate,
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s32 microseconds, enum altera_jtag_state wait_state)
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/*
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* Causes JTAG hardware to sit in the specified stable
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* state for the specified duration of real time. If
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* no JTAG operations have been performed yet, then only
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* a delay is performed. This permits the WAIT USECS
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* statement to be used in VECTOR programs without causing
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* any JTAG operations.
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* Returns 0 for success, else appropriate error code.
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*/
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{
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struct altera_jtag *js = &astate->js;
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int status = 0;
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if ((js->jtag_state != ILLEGAL_JTAG_STATE) &&
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(js->jtag_state != wait_state))
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status = altera_goto_jstate(astate, wait_state);
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if (status == 0)
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/* Wait for specified time interval */
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udelay(microseconds);
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return status;
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}
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static void altera_concatenate_data(u8 *buffer,
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u8 *preamble_data,
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u32 preamble_count,
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u8 *target_data,
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u32 start_index,
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u32 target_count,
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u8 *postamble_data,
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u32 postamble_count)
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/*
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* Copies preamble data, target data, and postamble data
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* into one buffer for IR or DR scans.
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*/
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{
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u32 i, j, k;
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for (i = 0L; i < preamble_count; ++i) {
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if (preamble_data[i >> 3L] & (1L << (i & 7L)))
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buffer[i >> 3L] |= (1L << (i & 7L));
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else
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buffer[i >> 3L] &= ~(u32)(1L << (i & 7L));
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}
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j = start_index;
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k = preamble_count + target_count;
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for (; i < k; ++i, ++j) {
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if (target_data[j >> 3L] & (1L << (j & 7L)))
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buffer[i >> 3L] |= (1L << (i & 7L));
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else
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buffer[i >> 3L] &= ~(u32)(1L << (i & 7L));
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}
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j = 0L;
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k = preamble_count + target_count + postamble_count;
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for (; i < k; ++i, ++j) {
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if (postamble_data[j >> 3L] & (1L << (j & 7L)))
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buffer[i >> 3L] |= (1L << (i & 7L));
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else
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buffer[i >> 3L] &= ~(u32)(1L << (i & 7L));
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}
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}
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static int alt_jtag_drscan(struct altera_state *astate,
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int start_state,
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int count,
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u8 *tdi,
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u8 *tdo)
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{
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int i = 0;
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int tdo_bit = 0;
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int status = 1;
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/* First go to DRSHIFT state */
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switch (start_state) {
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case 0: /* IDLE */
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alt_jtag_io(1, 0, 0); /* DRSELECT */
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alt_jtag_io(0, 0, 0); /* DRCAPTURE */
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alt_jtag_io(0, 0, 0); /* DRSHIFT */
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break;
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case 1: /* DRPAUSE */
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alt_jtag_io(1, 0, 0); /* DREXIT2 */
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alt_jtag_io(1, 0, 0); /* DRUPDATE */
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alt_jtag_io(1, 0, 0); /* DRSELECT */
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alt_jtag_io(0, 0, 0); /* DRCAPTURE */
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alt_jtag_io(0, 0, 0); /* DRSHIFT */
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break;
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case 2: /* IRPAUSE */
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alt_jtag_io(1, 0, 0); /* IREXIT2 */
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alt_jtag_io(1, 0, 0); /* IRUPDATE */
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alt_jtag_io(1, 0, 0); /* DRSELECT */
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alt_jtag_io(0, 0, 0); /* DRCAPTURE */
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alt_jtag_io(0, 0, 0); /* DRSHIFT */
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break;
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default:
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status = 0;
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}
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if (status) {
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/* loop in the SHIFT-DR state */
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for (i = 0; i < count; i++) {
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tdo_bit = alt_jtag_io(
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(i == count - 1),
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tdi[i >> 3] & (1 << (i & 7)),
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(tdo != NULL));
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if (tdo != NULL) {
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if (tdo_bit)
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tdo[i >> 3] |= (1 << (i & 7));
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else
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tdo[i >> 3] &= ~(u32)(1 << (i & 7));
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}
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}
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alt_jtag_io(0, 0, 0); /* DRPAUSE */
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}
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return status;
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}
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static int alt_jtag_irscan(struct altera_state *astate,
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|
int start_state,
|
|
int count,
|
|
u8 *tdi,
|
|
u8 *tdo)
|
|
{
|
|
int i = 0;
|
|
int tdo_bit = 0;
|
|
int status = 1;
|
|
|
|
/* First go to IRSHIFT state */
|
|
switch (start_state) {
|
|
case 0: /* IDLE */
|
|
alt_jtag_io(1, 0, 0); /* DRSELECT */
|
|
alt_jtag_io(1, 0, 0); /* IRSELECT */
|
|
alt_jtag_io(0, 0, 0); /* IRCAPTURE */
|
|
alt_jtag_io(0, 0, 0); /* IRSHIFT */
|
|
break;
|
|
|
|
case 1: /* DRPAUSE */
|
|
alt_jtag_io(1, 0, 0); /* DREXIT2 */
|
|
alt_jtag_io(1, 0, 0); /* DRUPDATE */
|
|
alt_jtag_io(1, 0, 0); /* DRSELECT */
|
|
alt_jtag_io(1, 0, 0); /* IRSELECT */
|
|
alt_jtag_io(0, 0, 0); /* IRCAPTURE */
|
|
alt_jtag_io(0, 0, 0); /* IRSHIFT */
|
|
break;
|
|
|
|
case 2: /* IRPAUSE */
|
|
alt_jtag_io(1, 0, 0); /* IREXIT2 */
|
|
alt_jtag_io(1, 0, 0); /* IRUPDATE */
|
|
alt_jtag_io(1, 0, 0); /* DRSELECT */
|
|
alt_jtag_io(1, 0, 0); /* IRSELECT */
|
|
alt_jtag_io(0, 0, 0); /* IRCAPTURE */
|
|
alt_jtag_io(0, 0, 0); /* IRSHIFT */
|
|
break;
|
|
|
|
default:
|
|
status = 0;
|
|
}
|
|
|
|
if (status) {
|
|
/* loop in the SHIFT-IR state */
|
|
for (i = 0; i < count; i++) {
|
|
tdo_bit = alt_jtag_io(
|
|
(i == count - 1),
|
|
tdi[i >> 3] & (1 << (i & 7)),
|
|
(tdo != NULL));
|
|
if (tdo != NULL) {
|
|
if (tdo_bit)
|
|
tdo[i >> 3] |= (1 << (i & 7));
|
|
else
|
|
tdo[i >> 3] &= ~(u32)(1 << (i & 7));
|
|
|
|
}
|
|
}
|
|
|
|
alt_jtag_io(0, 0, 0); /* IRPAUSE */
|
|
}
|
|
|
|
return status;
|
|
}
|
|
|
|
static void altera_extract_target_data(u8 *buffer,
|
|
u8 *target_data,
|
|
u32 start_index,
|
|
u32 preamble_count,
|
|
u32 target_count)
|
|
/*
|
|
* Copies target data from scan buffer, filtering out
|
|
* preamble and postamble data.
|
|
*/
|
|
{
|
|
u32 i;
|
|
u32 j;
|
|
u32 k;
|
|
|
|
j = preamble_count;
|
|
k = start_index + target_count;
|
|
for (i = start_index; i < k; ++i, ++j) {
|
|
if (buffer[j >> 3] & (1 << (j & 7)))
|
|
target_data[i >> 3] |= (1 << (i & 7));
|
|
else
|
|
target_data[i >> 3] &= ~(u32)(1 << (i & 7));
|
|
|
|
}
|
|
}
|
|
|
|
int altera_irscan(struct altera_state *astate,
|
|
u32 count,
|
|
u8 *tdi_data,
|
|
u32 start_index)
|
|
/* Shifts data into instruction register */
|
|
{
|
|
struct altera_jtag *js = &astate->js;
|
|
int start_code = 0;
|
|
u32 alloc_chars = 0;
|
|
u32 shift_count = js->ir_pre + count + js->ir_post;
|
|
int status = 0;
|
|
enum altera_jtag_state start_state = ILLEGAL_JTAG_STATE;
|
|
|
|
switch (js->jtag_state) {
|
|
case ILLEGAL_JTAG_STATE:
|
|
case RESET:
|
|
case IDLE:
|
|
start_code = 0;
|
|
start_state = IDLE;
|
|
break;
|
|
|
|
case DRSELECT:
|
|
case DRCAPTURE:
|
|
case DRSHIFT:
|
|
case DREXIT1:
|
|
case DRPAUSE:
|
|
case DREXIT2:
|
|
case DRUPDATE:
|
|
start_code = 1;
|
|
start_state = DRPAUSE;
|
|
break;
|
|
|
|
case IRSELECT:
|
|
case IRCAPTURE:
|
|
case IRSHIFT:
|
|
case IREXIT1:
|
|
case IRPAUSE:
|
|
case IREXIT2:
|
|
case IRUPDATE:
|
|
start_code = 2;
|
|
start_state = IRPAUSE;
|
|
break;
|
|
|
|
default:
|
|
status = -EREMOTEIO;
|
|
break;
|
|
}
|
|
|
|
if (status == 0)
|
|
if (js->jtag_state != start_state)
|
|
status = altera_goto_jstate(astate, start_state);
|
|
|
|
if (status == 0) {
|
|
if (shift_count > js->ir_length) {
|
|
alloc_chars = (shift_count + 7) >> 3;
|
|
kfree(js->ir_buffer);
|
|
js->ir_buffer = (u8 *)alt_malloc(alloc_chars);
|
|
if (js->ir_buffer == NULL)
|
|
status = -ENOMEM;
|
|
else
|
|
js->ir_length = alloc_chars * 8;
|
|
|
|
}
|
|
}
|
|
|
|
if (status == 0) {
|
|
/*
|
|
* Copy preamble data, IR data,
|
|
* and postamble data into a buffer
|
|
*/
|
|
altera_concatenate_data(js->ir_buffer,
|
|
js->ir_pre_data,
|
|
js->ir_pre,
|
|
tdi_data,
|
|
start_index,
|
|
count,
|
|
js->ir_post_data,
|
|
js->ir_post);
|
|
/* Do the IRSCAN */
|
|
alt_jtag_irscan(astate,
|
|
start_code,
|
|
shift_count,
|
|
js->ir_buffer,
|
|
NULL);
|
|
|
|
/* alt_jtag_irscan() always ends in IRPAUSE state */
|
|
js->jtag_state = IRPAUSE;
|
|
}
|
|
|
|
if (status == 0)
|
|
if (js->irstop_state != IRPAUSE)
|
|
status = altera_goto_jstate(astate, js->irstop_state);
|
|
|
|
|
|
return status;
|
|
}
|
|
|
|
int altera_swap_ir(struct altera_state *astate,
|
|
u32 count,
|
|
u8 *in_data,
|
|
u32 in_index,
|
|
u8 *out_data,
|
|
u32 out_index)
|
|
/* Shifts data into instruction register, capturing output data */
|
|
{
|
|
struct altera_jtag *js = &astate->js;
|
|
int start_code = 0;
|
|
u32 alloc_chars = 0;
|
|
u32 shift_count = js->ir_pre + count + js->ir_post;
|
|
int status = 0;
|
|
enum altera_jtag_state start_state = ILLEGAL_JTAG_STATE;
|
|
|
|
switch (js->jtag_state) {
|
|
case ILLEGAL_JTAG_STATE:
|
|
case RESET:
|
|
case IDLE:
|
|
start_code = 0;
|
|
start_state = IDLE;
|
|
break;
|
|
|
|
case DRSELECT:
|
|
case DRCAPTURE:
|
|
case DRSHIFT:
|
|
case DREXIT1:
|
|
case DRPAUSE:
|
|
case DREXIT2:
|
|
case DRUPDATE:
|
|
start_code = 1;
|
|
start_state = DRPAUSE;
|
|
break;
|
|
|
|
case IRSELECT:
|
|
case IRCAPTURE:
|
|
case IRSHIFT:
|
|
case IREXIT1:
|
|
case IRPAUSE:
|
|
case IREXIT2:
|
|
case IRUPDATE:
|
|
start_code = 2;
|
|
start_state = IRPAUSE;
|
|
break;
|
|
|
|
default:
|
|
status = -EREMOTEIO;
|
|
break;
|
|
}
|
|
|
|
if (status == 0)
|
|
if (js->jtag_state != start_state)
|
|
status = altera_goto_jstate(astate, start_state);
|
|
|
|
if (status == 0) {
|
|
if (shift_count > js->ir_length) {
|
|
alloc_chars = (shift_count + 7) >> 3;
|
|
kfree(js->ir_buffer);
|
|
js->ir_buffer = (u8 *)alt_malloc(alloc_chars);
|
|
if (js->ir_buffer == NULL)
|
|
status = -ENOMEM;
|
|
else
|
|
js->ir_length = alloc_chars * 8;
|
|
|
|
}
|
|
}
|
|
|
|
if (status == 0) {
|
|
/*
|
|
* Copy preamble data, IR data,
|
|
* and postamble data into a buffer
|
|
*/
|
|
altera_concatenate_data(js->ir_buffer,
|
|
js->ir_pre_data,
|
|
js->ir_pre,
|
|
in_data,
|
|
in_index,
|
|
count,
|
|
js->ir_post_data,
|
|
js->ir_post);
|
|
|
|
/* Do the IRSCAN */
|
|
alt_jtag_irscan(astate,
|
|
start_code,
|
|
shift_count,
|
|
js->ir_buffer,
|
|
js->ir_buffer);
|
|
|
|
/* alt_jtag_irscan() always ends in IRPAUSE state */
|
|
js->jtag_state = IRPAUSE;
|
|
}
|
|
|
|
if (status == 0)
|
|
if (js->irstop_state != IRPAUSE)
|
|
status = altera_goto_jstate(astate, js->irstop_state);
|
|
|
|
|
|
if (status == 0)
|
|
/* Now extract the returned data from the buffer */
|
|
altera_extract_target_data(js->ir_buffer,
|
|
out_data, out_index,
|
|
js->ir_pre, count);
|
|
|
|
return status;
|
|
}
|
|
|
|
int altera_drscan(struct altera_state *astate,
|
|
u32 count,
|
|
u8 *tdi_data,
|
|
u32 start_index)
|
|
/* Shifts data into data register (ignoring output data) */
|
|
{
|
|
struct altera_jtag *js = &astate->js;
|
|
int start_code = 0;
|
|
u32 alloc_chars = 0;
|
|
u32 shift_count = js->dr_pre + count + js->dr_post;
|
|
int status = 0;
|
|
enum altera_jtag_state start_state = ILLEGAL_JTAG_STATE;
|
|
|
|
switch (js->jtag_state) {
|
|
case ILLEGAL_JTAG_STATE:
|
|
case RESET:
|
|
case IDLE:
|
|
start_code = 0;
|
|
start_state = IDLE;
|
|
break;
|
|
|
|
case DRSELECT:
|
|
case DRCAPTURE:
|
|
case DRSHIFT:
|
|
case DREXIT1:
|
|
case DRPAUSE:
|
|
case DREXIT2:
|
|
case DRUPDATE:
|
|
start_code = 1;
|
|
start_state = DRPAUSE;
|
|
break;
|
|
|
|
case IRSELECT:
|
|
case IRCAPTURE:
|
|
case IRSHIFT:
|
|
case IREXIT1:
|
|
case IRPAUSE:
|
|
case IREXIT2:
|
|
case IRUPDATE:
|
|
start_code = 2;
|
|
start_state = IRPAUSE;
|
|
break;
|
|
|
|
default:
|
|
status = -EREMOTEIO;
|
|
break;
|
|
}
|
|
|
|
if (status == 0)
|
|
if (js->jtag_state != start_state)
|
|
status = altera_goto_jstate(astate, start_state);
|
|
|
|
if (status == 0) {
|
|
if (shift_count > js->dr_length) {
|
|
alloc_chars = (shift_count + 7) >> 3;
|
|
kfree(js->dr_buffer);
|
|
js->dr_buffer = (u8 *)alt_malloc(alloc_chars);
|
|
if (js->dr_buffer == NULL)
|
|
status = -ENOMEM;
|
|
else
|
|
js->dr_length = alloc_chars * 8;
|
|
|
|
}
|
|
}
|
|
|
|
if (status == 0) {
|
|
/*
|
|
* Copy preamble data, DR data,
|
|
* and postamble data into a buffer
|
|
*/
|
|
altera_concatenate_data(js->dr_buffer,
|
|
js->dr_pre_data,
|
|
js->dr_pre,
|
|
tdi_data,
|
|
start_index,
|
|
count,
|
|
js->dr_post_data,
|
|
js->dr_post);
|
|
/* Do the DRSCAN */
|
|
alt_jtag_drscan(astate, start_code, shift_count,
|
|
js->dr_buffer, NULL);
|
|
/* alt_jtag_drscan() always ends in DRPAUSE state */
|
|
js->jtag_state = DRPAUSE;
|
|
}
|
|
|
|
if (status == 0)
|
|
if (js->drstop_state != DRPAUSE)
|
|
status = altera_goto_jstate(astate, js->drstop_state);
|
|
|
|
return status;
|
|
}
|
|
|
|
int altera_swap_dr(struct altera_state *astate, u32 count,
|
|
u8 *in_data, u32 in_index,
|
|
u8 *out_data, u32 out_index)
|
|
/* Shifts data into data register, capturing output data */
|
|
{
|
|
struct altera_jtag *js = &astate->js;
|
|
int start_code = 0;
|
|
u32 alloc_chars = 0;
|
|
u32 shift_count = js->dr_pre + count + js->dr_post;
|
|
int status = 0;
|
|
enum altera_jtag_state start_state = ILLEGAL_JTAG_STATE;
|
|
|
|
switch (js->jtag_state) {
|
|
case ILLEGAL_JTAG_STATE:
|
|
case RESET:
|
|
case IDLE:
|
|
start_code = 0;
|
|
start_state = IDLE;
|
|
break;
|
|
|
|
case DRSELECT:
|
|
case DRCAPTURE:
|
|
case DRSHIFT:
|
|
case DREXIT1:
|
|
case DRPAUSE:
|
|
case DREXIT2:
|
|
case DRUPDATE:
|
|
start_code = 1;
|
|
start_state = DRPAUSE;
|
|
break;
|
|
|
|
case IRSELECT:
|
|
case IRCAPTURE:
|
|
case IRSHIFT:
|
|
case IREXIT1:
|
|
case IRPAUSE:
|
|
case IREXIT2:
|
|
case IRUPDATE:
|
|
start_code = 2;
|
|
start_state = IRPAUSE;
|
|
break;
|
|
|
|
default:
|
|
status = -EREMOTEIO;
|
|
break;
|
|
}
|
|
|
|
if (status == 0)
|
|
if (js->jtag_state != start_state)
|
|
status = altera_goto_jstate(astate, start_state);
|
|
|
|
if (status == 0) {
|
|
if (shift_count > js->dr_length) {
|
|
alloc_chars = (shift_count + 7) >> 3;
|
|
kfree(js->dr_buffer);
|
|
js->dr_buffer = (u8 *)alt_malloc(alloc_chars);
|
|
|
|
if (js->dr_buffer == NULL)
|
|
status = -ENOMEM;
|
|
else
|
|
js->dr_length = alloc_chars * 8;
|
|
|
|
}
|
|
}
|
|
|
|
if (status == 0) {
|
|
/*
|
|
* Copy preamble data, DR data,
|
|
* and postamble data into a buffer
|
|
*/
|
|
altera_concatenate_data(js->dr_buffer,
|
|
js->dr_pre_data,
|
|
js->dr_pre,
|
|
in_data,
|
|
in_index,
|
|
count,
|
|
js->dr_post_data,
|
|
js->dr_post);
|
|
|
|
/* Do the DRSCAN */
|
|
alt_jtag_drscan(astate,
|
|
start_code,
|
|
shift_count,
|
|
js->dr_buffer,
|
|
js->dr_buffer);
|
|
|
|
/* alt_jtag_drscan() always ends in DRPAUSE state */
|
|
js->jtag_state = DRPAUSE;
|
|
}
|
|
|
|
if (status == 0)
|
|
if (js->drstop_state != DRPAUSE)
|
|
status = altera_goto_jstate(astate, js->drstop_state);
|
|
|
|
if (status == 0)
|
|
/* Now extract the returned data from the buffer */
|
|
altera_extract_target_data(js->dr_buffer,
|
|
out_data,
|
|
out_index,
|
|
js->dr_pre,
|
|
count);
|
|
|
|
return status;
|
|
}
|
|
|
|
void altera_free_buffers(struct altera_state *astate)
|
|
{
|
|
struct altera_jtag *js = &astate->js;
|
|
/* If the JTAG interface was used, reset it to TLR */
|
|
if (js->jtag_state != ILLEGAL_JTAG_STATE)
|
|
altera_jreset_idle(astate);
|
|
|
|
kfree(js->dr_pre_data);
|
|
js->dr_pre_data = NULL;
|
|
|
|
kfree(js->dr_post_data);
|
|
js->dr_post_data = NULL;
|
|
|
|
kfree(js->dr_buffer);
|
|
js->dr_buffer = NULL;
|
|
|
|
kfree(js->ir_pre_data);
|
|
js->ir_pre_data = NULL;
|
|
|
|
kfree(js->ir_post_data);
|
|
js->ir_post_data = NULL;
|
|
|
|
kfree(js->ir_buffer);
|
|
js->ir_buffer = NULL;
|
|
}
|