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ba411a8609
[ Upstream commit4917e498c6] The ARR register is cleared unconditionally upon probing, after the maximum value has been read. This initial condition is rather not intuitive, when considering the counter child driver. It rather expects the maximum value by default: - The counter interface shows a zero value by default for 'ceiling' attribute. - Enabling the counter without any prior configuration makes it doesn't count. The reset value of ARR register is the maximum. So Choice here is to backup it, and restore it then, instead of clearing its value. It also fixes the initial condition seen by the counter driver. Fixes:d0f949e220("mfd: Add STM32 Timers driver") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
85 lines
2.1 KiB
C
85 lines
2.1 KiB
C
/*
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* Copyright (C) STMicroelectronics 2016
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*
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* Author: Benjamin Gaignard <benjamin.gaignard@st.com>
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*
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include <linux/mfd/stm32-timers.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/reset.h>
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static const struct regmap_config stm32_timers_regmap_cfg = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = sizeof(u32),
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.max_register = 0x3fc,
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};
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static void stm32_timers_get_arr_size(struct stm32_timers *ddata)
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{
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u32 arr;
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/* Backup ARR to restore it after getting the maximum value */
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regmap_read(ddata->regmap, TIM_ARR, &arr);
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/*
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* Only the available bits will be written so when readback
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* we get the maximum value of auto reload register
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*/
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regmap_write(ddata->regmap, TIM_ARR, ~0L);
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regmap_read(ddata->regmap, TIM_ARR, &ddata->max_arr);
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regmap_write(ddata->regmap, TIM_ARR, arr);
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}
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static int stm32_timers_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct stm32_timers *ddata;
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struct resource *res;
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void __iomem *mmio;
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ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
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if (!ddata)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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mmio = devm_ioremap_resource(dev, res);
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if (IS_ERR(mmio))
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return PTR_ERR(mmio);
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ddata->regmap = devm_regmap_init_mmio_clk(dev, "int", mmio,
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&stm32_timers_regmap_cfg);
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if (IS_ERR(ddata->regmap))
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return PTR_ERR(ddata->regmap);
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ddata->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(ddata->clk))
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return PTR_ERR(ddata->clk);
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stm32_timers_get_arr_size(ddata);
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platform_set_drvdata(pdev, ddata);
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return devm_of_platform_populate(&pdev->dev);
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}
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static const struct of_device_id stm32_timers_of_match[] = {
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{ .compatible = "st,stm32-timers", },
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{ /* end node */ },
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};
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MODULE_DEVICE_TABLE(of, stm32_timers_of_match);
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static struct platform_driver stm32_timers_driver = {
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.probe = stm32_timers_probe,
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.driver = {
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.name = "stm32-timers",
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.of_match_table = stm32_timers_of_match,
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},
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};
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module_platform_driver(stm32_timers_driver);
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MODULE_DESCRIPTION("STMicroelectronics STM32 Timers");
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MODULE_LICENSE("GPL v2");
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