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59ea187624
In the _start block we now iterate over envp to find the auxiliary vector after the NULL. The pointer is saved into an _auxv variable that is marked as weak so that it's accessible from multiple units. Signed-off-by: Willy Tarreau <w@1wt.eu> It was tested in arm, thumb1 and thumb2 modes. Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
242 lines
11 KiB
C
242 lines
11 KiB
C
/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* ARM specific definitions for NOLIBC
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* Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
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*/
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#ifndef _NOLIBC_ARCH_ARM_H
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#define _NOLIBC_ARCH_ARM_H
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/* The struct returned by the stat() syscall, 32-bit only, the syscall returns
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* exactly 56 bytes (stops before the unused array). In big endian, the format
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* differs as devices are returned as short only.
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*/
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struct sys_stat_struct {
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#if defined(__ARMEB__)
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unsigned short st_dev;
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unsigned short __pad1;
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#else
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unsigned long st_dev;
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#endif
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unsigned long st_ino;
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unsigned short st_mode;
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unsigned short st_nlink;
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unsigned short st_uid;
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unsigned short st_gid;
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#if defined(__ARMEB__)
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unsigned short st_rdev;
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unsigned short __pad2;
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#else
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unsigned long st_rdev;
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#endif
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unsigned long st_size;
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unsigned long st_blksize;
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unsigned long st_blocks;
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unsigned long st_atime;
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unsigned long st_atime_nsec;
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unsigned long st_mtime;
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unsigned long st_mtime_nsec;
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unsigned long st_ctime;
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unsigned long st_ctime_nsec;
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unsigned long __unused[2];
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};
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/* Syscalls for ARM in ARM or Thumb modes :
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* - registers are 32-bit
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* - stack is 8-byte aligned
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* ( http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka4127.html)
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* - syscall number is passed in r7
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* - arguments are in r0, r1, r2, r3, r4, r5
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* - the system call is performed by calling svc #0
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* - syscall return comes in r0.
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* - only lr is clobbered.
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* - the arguments are cast to long and assigned into the target registers
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* which are then simply passed as registers to the asm code, so that we
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* don't have to experience issues with register constraints.
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* - the syscall number is always specified last in order to allow to force
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* some registers before (gcc refuses a %-register at the last position).
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* - in thumb mode without -fomit-frame-pointer, r7 is also used to store the
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* frame pointer, and we cannot directly assign it as a register variable,
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* nor can we clobber it. Instead we assign the r6 register and swap it
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* with r7 before calling svc, and r6 is marked as clobbered.
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* We're just using any regular register which we assign to r7 after saving
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* it.
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*
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* Also, ARM supports the old_select syscall if newselect is not available
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*/
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#define __ARCH_WANT_SYS_OLD_SELECT
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#if (defined(__THUMBEB__) || defined(__THUMBEL__)) && \
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!defined(NOLIBC_OMIT_FRAME_POINTER)
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/* swap r6,r7 needed in Thumb mode since we can't use nor clobber r7 */
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#define _NOLIBC_SYSCALL_REG "r6"
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#define _NOLIBC_THUMB_SET_R7 "eor r7, r6\neor r6, r7\neor r7, r6\n"
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#define _NOLIBC_THUMB_RESTORE_R7 "mov r7, r6\n"
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#else /* we're in ARM mode */
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/* in Arm mode we can directly use r7 */
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#define _NOLIBC_SYSCALL_REG "r7"
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#define _NOLIBC_THUMB_SET_R7 ""
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#define _NOLIBC_THUMB_RESTORE_R7 ""
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#endif /* end THUMB */
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#define my_syscall0(num) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0"); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r"(_num) \
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: "r"(_arg1), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define my_syscall1(num, arg1) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define my_syscall2(num, arg1, arg2) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define my_syscall3(num, arg1, arg2, arg3) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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register long _arg3 __asm__ ("r2") = (long)(arg3); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define my_syscall4(num, arg1, arg2, arg3, arg4) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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register long _arg3 __asm__ ("r2") = (long)(arg3); \
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register long _arg4 __asm__ ("r3") = (long)(arg4); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__(_NOLIBC_SYSCALL_REG) = (num); \
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register long _arg1 __asm__ ("r0") = (long)(arg1); \
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register long _arg2 __asm__ ("r1") = (long)(arg2); \
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register long _arg3 __asm__ ("r2") = (long)(arg3); \
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register long _arg4 __asm__ ("r3") = (long)(arg4); \
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register long _arg5 __asm__ ("r4") = (long)(arg5); \
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\
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__asm__ volatile ( \
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_NOLIBC_THUMB_SET_R7 \
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"svc #0\n" \
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_NOLIBC_THUMB_RESTORE_R7 \
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: "=r"(_arg1), "=r" (_num) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_num) \
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: "memory", "cc", "lr" \
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); \
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_arg1; \
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})
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char **environ __attribute__((weak));
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const unsigned long *_auxv __attribute__((weak));
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/* startup code */
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void __attribute__((weak,noreturn,optimize("omit-frame-pointer"))) _start(void)
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{
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__asm__ volatile (
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"pop {%r0}\n" // argc was in the stack
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"mov %r1, %sp\n" // argv = sp
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"add %r2, %r0, $1\n" // envp = (argc + 1) ...
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"lsl %r2, %r2, $2\n" // * 4 ...
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"add %r2, %r2, %r1\n" // + argv
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"ldr %r3, 1f\n" // r3 = &environ (see below)
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"str %r2, [r3]\n" // store envp into environ
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"mov r4, r2\n" // search for auxv (follows NULL after last env)
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"0:\n"
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"mov r5, r4\n" // r5 = r4
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"add r4, r4, #4\n" // r4 += 4
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"ldr r5,[r5]\n" // r5 = *r5 = *(r4-4)
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"cmp r5, #0\n" // and stop at NULL after last env
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"bne 0b\n"
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"ldr %r3, 2f\n" // r3 = &_auxv (low bits)
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"str r4, [r3]\n" // store r4 into _auxv
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"mov %r3, $8\n" // AAPCS : sp must be 8-byte aligned in the
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"neg %r3, %r3\n" // callee, and bl doesn't push (lr=pc)
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"and %r3, %r3, %r1\n" // so we do sp = r1(=sp) & r3(=-8);
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"mov %sp, %r3\n" //
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"bl main\n" // main() returns the status code, we'll exit with it.
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"movs r7, $1\n" // NR_exit == 1
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"svc $0x00\n"
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".align 2\n" // below are the pointers to a few variables
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"1:\n"
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".word environ\n"
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"2:\n"
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".word _auxv\n"
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);
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__builtin_unreachable();
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}
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#endif // _NOLIBC_ARCH_ARM_H
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