Vincent Chen 800149a77c riscv: sifive: Apply errata "cip-453" patch ... Add sign extension to the $badaddr before addressing the instruction page fault and instruction access fault to workaround the issue "cip-453". To avoid affecting the existing code sequence, this patch will creates two trampolines to add sign extension to the $badaddr. By the "alternative" mechanism, these two trampolines will replace the original exception handler of instruction page fault and instruction access fault in the excp_vect_table. In this case, only the specific SiFive CPU core jumps to the do_page_fault and do_trap_insn_fault through these two trampolines. Other CPUs are not affected. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-04-26 08:24:57 -07:00
..
probes	RISC-V: probes: Treat the instruction stream as host-endian	2021-02-18 23:18:02 -08:00
vdso	riscv: Disable KSAN_SANITIZE for vDSO	2021-02-22 17:51:23 -08:00
.gitignore	.gitignore: add SPDX License Identifier	2020-03-25 11:50:48 +01:00
asm-offsets.c	riscv: Enable per-task stack canaries	2021-01-14 15:09:10 -08:00
cacheinfo.c	riscv: cacheinfo: Fix using smp_processor_id() in preemptible	2021-01-12 20:25:32 -08:00
cpu-hotplug.c	RISC-V: Support cpu hotplug	2020-03-31 11:28:30 -07:00
cpu.c	RISC-V: Rename and move plic_find_hart_id() to arch directory	2020-06-09 19:11:20 -07:00
cpu_ops.c	treewide: Convert macro and uses of __section(foo) to __section("foo")	2020-10-25 14:51:49 -07:00
cpu_ops_sbi.c	RISC-V: Support cpu hotplug	2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c	RISC-V: Add cpu_ops and modify default booting method	2020-03-31 11:25:56 -07:00
cpufeature.c	RISC-V: Add bitmap reprensenting ISA features common across CPUs	2020-05-04 14:08:59 -07:00
efi-header.S	RISC-V: Add PE/COFF header for EFI stub	2020-10-02 14:31:16 -07:00
efi.c	RISC-V: Add EFI runtime services	2020-10-02 14:31:28 -07:00
entry.S	riscv: sifive: Apply errata "cip-453" patch	2021-04-26 08:24:57 -07:00
fpu.S	riscv: abstract out CSR names for supervisor vs machine mode	2019-11-05 09:20:42 -08:00
ftrace.c	riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT	2021-01-14 15:09:05 -08:00
head.h	RISC-V: Move DT mapping outof fixmap	2020-10-02 14:30:57 -07:00
head.S	riscv: add BUILTIN_DTB support for MMU-enabled targets	2021-02-18 23:17:54 -08:00
image-vars.h	arch/riscv:fix typo in a comment in arch/riscv/kernel/image-vars.h	2021-02-18 23:18:00 -08:00
irq.c	RISC-V: Remove do_IRQ() function	2020-06-09 19:11:24 -07:00
jump_label.c	riscv: Add jump-label implementation	2020-07-30 11:37:43 -07:00
kgdb.c	riscv: Fix "no previous prototype" compile warning in kgdb.c file	2020-07-09 20:09:30 -07:00
Makefile	riscv: Add kprobes supported	2021-01-14 15:09:06 -08:00
mcount-dyn.S	riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT	2021-01-14 15:09:05 -08:00
mcount.S	RISC-V: remove the unused return_to_handler export	2018-10-22 17:38:12 -07:00
module-sections.c	riscv: add missing header file includes	2019-10-28 00:46:01 -07:00
module.c	riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs	2020-07-30 11:37:41 -07:00
patch.c	riscv: Fixup compile error BUILD_BUG_ON failed	2021-01-14 15:09:01 -08:00
perf_callchain.c	riscv: Make stack walk callback consistent with generic code	2020-11-20 18:53:38 -08:00
perf_event.c	riscv: perf_event: Make some funciton static	2020-05-11 13:48:19 -07:00
perf_regs.c	perf/arch: Remove perf_sample_data::regs_user_copy	2020-11-09 18:12:34 +01:00
process.c	io_uring-worker.v3-2021-02-25	2021-02-27 08:29:02 -08:00
ptrace.c	RISC-V: Implement ptrace regs and stack API	2021-01-14 15:09:01 -08:00
reset.c	riscv: cleanup the default power off implementation	2019-11-13 13:22:52 -08:00
riscv_ksyms.c	riscv: provide memmove implementation	2020-12-10 17:27:54 -08:00
sbi.c	riscv: Add 3 SBI wrapper functions to get cpu manufacturer information	2021-04-26 08:24:54 -07:00
setup.c	RISC-V Patches for the 5.12 Merge Window	2021-02-26 10:28:35 -08:00
signal.c	riscv: Add uprobes supported	2021-01-14 15:09:08 -08:00
smp.c	riscv: Enable generic clockevent broadcast	2021-03-16 20:40:06 -07:00
smpboot.c	riscv: Introduce alternative mechanism to apply errata solution	2021-04-26 08:24:55 -07:00
soc.c	riscv: Fix builtin DTB handling	2021-01-07 19:00:50 -08:00
stacktrace.c	RISC-V Patches for the 5.12 Merge Window	2021-02-26 10:28:35 -08:00
sys_riscv.c	RISC-V: Don't allow write+exec only page mapping request in mmap	2020-06-18 17:28:53 -07:00
syscall_table.c	riscv: add missing header file includes	2019-10-28 00:46:01 -07:00
time.c	riscv: Fix kernel time_init()	2021-01-07 18:01:36 -08:00
traps.c	riscv: Add dump stack in show_regs	2021-01-14 15:09:11 -08:00
traps_misaligned.c	riscv: Unaligned load/store handling for M_MODE	2020-04-03 10:45:33 -07:00
vdso.c	riscv: Fixup CONFIG_GENERIC_TIME_VSYSCALL	2021-01-12 20:34:44 -08:00
vmlinux.lds.S	riscv: Introduce alternative mechanism to apply errata solution	2021-04-26 08:24:55 -07:00