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3fed9e5514
If a compat process tries to execute an unknown system call above the __ARM_NR_COMPAT_END number, the kernel sends a SIGILL signal to the offending process. Information about the error is printed to dmesg in compat_arm_syscall() -> arm64_notify_die() -> arm64_force_sig_fault() -> arm64_show_signal(). arm64_show_signal() interprets a non-zero value for current->thread.fault_code as an exception syndrome and displays the message associated with the ESR_ELx.EC field (bits 31:26). current->thread.fault_code is set in compat_arm_syscall() -> arm64_notify_die() with the bad syscall number instead of a valid ESR_ELx value. This means that the ESR_ELx.EC field has the value that the user set for the syscall number and the kernel can end up printing bogus exception messages*. For example, for the syscall number 0x68000000, which evaluates to ESR_ELx.EC value of 0x1A (ESR_ELx_EC_FPAC) the kernel prints this error: [ 18.349161] syscall[300]: unhandled exception: ERET/ERETAA/ERETAB, ESR 0x68000000, Oops - bad compat syscall(2) in syscall[10000+50000] [ 18.350639] CPU: 2 PID: 300 Comm: syscall Not tainted 5.18.0-rc1 #79 [ 18.351249] Hardware name: Pine64 RockPro64 v2.0 (DT) [..] which is misleading, as the bad compat syscall has nothing to do with pointer authentication. Stop arm64_show_signal() from printing exception syndrome information by having compat_arm_syscall() set the ESR_ELx value to 0, as it has no meaning for an invalid system call number. The example above now becomes: [ 19.935275] syscall[301]: unhandled exception: Oops - bad compat syscall(2) in syscall[10000+50000] [ 19.936124] CPU: 1 PID: 301 Comm: syscall Not tainted 5.18.0-rc1-00005-g7e08006d4102 #80 [ 19.936894] Hardware name: Pine64 RockPro64 v2.0 (DT) [..] which although shows less information because the syscall number, wrongfully advertised as the ESR value, is missing, it is better than showing plainly wrong information. The syscall number can be easily obtained with strace. *A 32-bit value above or equal to 0x8000_0000 is interpreted as a negative integer in compat_arm_syscal() and the condition scno < __ARM_NR_COMPAT_END evaluates to true; the syscall will exit to userspace in this case with the ENOSYS error code instead of arm64_notify_die() being called. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220425114444.368693-3-alexandru.elisei@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
118 lines
2.9 KiB
C
118 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on arch/arm/kernel/sys_arm.c
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*
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* Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c
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* Copyright (C) 1995, 1996 Russell King.
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* Copyright (C) 2012 ARM Ltd.
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*/
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#include <linux/compat.h>
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#include <linux/cpufeature.h>
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#include <linux/sched.h>
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#include <linux/sched/signal.h>
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#include <linux/slab.h>
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#include <linux/syscalls.h>
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#include <linux/uaccess.h>
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#include <asm/cacheflush.h>
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#include <asm/system_misc.h>
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#include <asm/tlbflush.h>
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#include <asm/unistd.h>
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static long
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__do_compat_cache_op(unsigned long start, unsigned long end)
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{
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long ret;
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do {
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unsigned long chunk = min(PAGE_SIZE, end - start);
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if (fatal_signal_pending(current))
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return 0;
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if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) {
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/*
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* The workaround requires an inner-shareable tlbi.
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* We pick the reserved-ASID to minimise the impact.
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*/
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__tlbi(aside1is, __TLBI_VADDR(0, 0));
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dsb(ish);
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}
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ret = caches_clean_inval_user_pou(start, start + chunk);
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if (ret)
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return ret;
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cond_resched();
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start += chunk;
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} while (start < end);
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return 0;
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}
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static inline long
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do_compat_cache_op(unsigned long start, unsigned long end, int flags)
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{
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if (end < start || flags)
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return -EINVAL;
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if (!access_ok((const void __user *)start, end - start))
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return -EFAULT;
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return __do_compat_cache_op(start, end);
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}
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/*
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* Handle all unrecognised system calls.
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*/
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long compat_arm_syscall(struct pt_regs *regs, int scno)
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{
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unsigned long addr;
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switch (scno) {
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/*
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* Flush a region from virtual address 'r0' to virtual address 'r1'
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* _exclusive_. There is no alignment requirement on either address;
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* user space does not need to know the hardware cache layout.
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*
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* r2 contains flags. It should ALWAYS be passed as ZERO until it
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* is defined to be something else. For now we ignore it, but may
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* the fires of hell burn in your belly if you break this rule. ;)
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*
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* (at a later date, we may want to allow this call to not flush
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* various aspects of the cache. Passing '0' will guarantee that
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* everything necessary gets flushed to maintain consistency in
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* the specified region).
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*/
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case __ARM_NR_compat_cacheflush:
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return do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]);
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case __ARM_NR_compat_set_tls:
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current->thread.uw.tp_value = regs->regs[0];
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/*
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* Protect against register corruption from context switch.
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* See comment in tls_thread_flush.
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*/
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barrier();
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write_sysreg(regs->regs[0], tpidrro_el0);
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return 0;
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default:
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/*
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* Calls 0xf0xxx..0xf07ff are defined to return -ENOSYS
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* if not implemented, rather than raising SIGILL. This
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* way the calling program can gracefully determine whether
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* a feature is supported.
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*/
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if (scno < __ARM_NR_COMPAT_END)
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return -ENOSYS;
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break;
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}
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addr = instruction_pointer(regs) - (compat_thumb_mode(regs) ? 2 : 4);
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arm64_notify_die("Oops - bad compat syscall(2)", regs,
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SIGILL, ILL_ILLTRP, addr, 0);
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return 0;
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}
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