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Peter Zijlstra eb8921e584 x86/cpu: Sanitize FAM6_ATOM naming 
commit f2c4db1bd8 upstream

Going primarily by:

  https://en.wikipedia.org/wiki/List_of_Intel_Atom_microprocessors

with additional information gleaned from other related pages; notably:

 - Bonnell shrink was called Saltwell
 - Moorefield is the Merriefield refresh which makes it Airmont

The general naming scheme is: FAM6_ATOM_UARCH_SOCTYPE

  for i in `git grep -l FAM6_ATOM` ; do
	sed -i  -e 's/ATOM_PINEVIEW/ATOM_BONNELL/g'		\
		-e 's/ATOM_LINCROFT/ATOM_BONNELL_MID/'		\
		-e 's/ATOM_PENWELL/ATOM_SALTWELL_MID/g'		\
		-e 's/ATOM_CLOVERVIEW/ATOM_SALTWELL_TABLET/g'	\
		-e 's/ATOM_CEDARVIEW/ATOM_SALTWELL/g'		\
		-e 's/ATOM_SILVERMONT1/ATOM_SILVERMONT/g'	\
		-e 's/ATOM_SILVERMONT2/ATOM_SILVERMONT_X/g'	\
		-e 's/ATOM_MERRIFIELD/ATOM_SILVERMONT_MID/g'	\
		-e 's/ATOM_MOOREFIELD/ATOM_AIRMONT_MID/g'	\
		-e 's/ATOM_DENVERTON/ATOM_GOLDMONT_X/g'		\
		-e 's/ATOM_GEMINI_LAKE/ATOM_GOLDMONT_PLUS/g' ${i}
  done

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: dave.hansen@linux.intel.com
Cc: len.brown@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-14 19:18:42 +02:00
..
device_libs x86/cpu: Sanitize FAM6_ATOM naming 2019-05-14 19:18:42 +02:00
intel-mid.c x86/platform/intel-mid: Handle Intel Edison reboot correctly 2018-03-08 22:41:07 -08:00
intel_mid_vrtc.c rtc: cmos: move mc146818rtc code out of asm-generic/rtc.h 2016-06-04 00:20:00 +02:00
intel_mid_weak_decls.h x86, intel-mid: Remove "weak" from function declarations 2014-10-22 16:14:03 -06:00
Makefile x86/platform/intel-mid: Rename mrfl.c to mrfld.c 2016-07-09 14:02:09 +02:00
mfld.c x86/platform/intel-mid: Use common power off sequence 2017-03-13 22:08:28 +01:00
mrfld.c x86/platform/intel-mid: Enable RTC on Intel Merrifield 2017-01-14 08:30:45 +01:00
pwr.c x86/platform/intel-mid: Make several arrays static, to make code smaller 2017-08-29 13:30:16 +02:00
sfi.c x86/platform/intel-mid: Allocate RTC interrupt for Merrifield 2017-01-20 10:07:41 +01:00