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![Philippe De Muyter](/assets/img/avatar_default.png)
The bestcomm dma hardware, and some of its users like the FEC ethernet component, is used in different FreeScale parts, including non-powerpc parts like the ColdFire MCF547x & MCF548x families. Don't keep the driver hidden in arch/powerpc where it is inaccessible for other arches. .c files are moved to drivers/dma/bestcomm, while .h files are moved to include/linux/fsl/bestcomm. Makefiles, Kconfigs and #include directives are updated for the new file locations. Tested by recompiling for MPC5200 with all bestcomm users enabled. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Anatolij Gustschin <agust@denx.de>
354 lines
9.3 KiB
C
354 lines
9.3 KiB
C
/*
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* Driver for MPC52xx processor BestComm General Buffer Descriptor
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*
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* Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
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* Copyright (C) 2006 AppSpec Computer Technologies Corp.
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* Jeff Gibbons <jeff.gibbons@appspec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/mpc52xx.h>
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#include <asm/mpc52xx_psc.h>
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#include <linux/fsl/bestcomm/bestcomm.h>
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#include <linux/fsl/bestcomm/bestcomm_priv.h>
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#include <linux/fsl/bestcomm/gen_bd.h>
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/* ======================================================================== */
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/* Task image/var/inc */
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/* ======================================================================== */
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/* gen_bd tasks images */
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extern u32 bcom_gen_bd_rx_task[];
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extern u32 bcom_gen_bd_tx_task[];
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/* rx task vars that need to be set before enabling the task */
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struct bcom_gen_bd_rx_var {
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u32 enable; /* (u16*) address of task's control register */
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u32 fifo; /* (u32*) address of gen_bd's fifo */
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u32 bd_base; /* (struct bcom_bd*) beginning of ring buffer */
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u32 bd_last; /* (struct bcom_bd*) end of ring buffer */
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u32 bd_start; /* (struct bcom_bd*) current bd */
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u32 buffer_size; /* size of receive buffer */
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};
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/* rx task incs that need to be set before enabling the task */
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struct bcom_gen_bd_rx_inc {
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u16 pad0;
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s16 incr_bytes;
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u16 pad1;
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s16 incr_dst;
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};
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/* tx task vars that need to be set before enabling the task */
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struct bcom_gen_bd_tx_var {
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u32 fifo; /* (u32*) address of gen_bd's fifo */
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u32 enable; /* (u16*) address of task's control register */
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u32 bd_base; /* (struct bcom_bd*) beginning of ring buffer */
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u32 bd_last; /* (struct bcom_bd*) end of ring buffer */
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u32 bd_start; /* (struct bcom_bd*) current bd */
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u32 buffer_size; /* set by uCode for each packet */
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};
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/* tx task incs that need to be set before enabling the task */
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struct bcom_gen_bd_tx_inc {
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u16 pad0;
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s16 incr_bytes;
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u16 pad1;
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s16 incr_src;
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u16 pad2;
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s16 incr_src_ma;
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};
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/* private structure */
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struct bcom_gen_bd_priv {
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phys_addr_t fifo;
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int initiator;
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int ipr;
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int maxbufsize;
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};
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/* ======================================================================== */
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/* Task support code */
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/* ======================================================================== */
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struct bcom_task *
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bcom_gen_bd_rx_init(int queue_len, phys_addr_t fifo,
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int initiator, int ipr, int maxbufsize)
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{
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struct bcom_task *tsk;
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struct bcom_gen_bd_priv *priv;
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tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_gen_bd),
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sizeof(struct bcom_gen_bd_priv));
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if (!tsk)
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return NULL;
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tsk->flags = BCOM_FLAGS_NONE;
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priv = tsk->priv;
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priv->fifo = fifo;
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priv->initiator = initiator;
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priv->ipr = ipr;
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priv->maxbufsize = maxbufsize;
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if (bcom_gen_bd_rx_reset(tsk)) {
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bcom_task_free(tsk);
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return NULL;
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}
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return tsk;
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_rx_init);
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int
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bcom_gen_bd_rx_reset(struct bcom_task *tsk)
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{
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struct bcom_gen_bd_priv *priv = tsk->priv;
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struct bcom_gen_bd_rx_var *var;
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struct bcom_gen_bd_rx_inc *inc;
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/* Shutdown the task */
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bcom_disable_task(tsk->tasknum);
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/* Reset the microcode */
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var = (struct bcom_gen_bd_rx_var *) bcom_task_var(tsk->tasknum);
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inc = (struct bcom_gen_bd_rx_inc *) bcom_task_inc(tsk->tasknum);
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if (bcom_load_image(tsk->tasknum, bcom_gen_bd_rx_task))
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return -1;
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var->enable = bcom_eng->regs_base +
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offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);
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var->fifo = (u32) priv->fifo;
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var->bd_base = tsk->bd_pa;
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var->bd_last = tsk->bd_pa + ((tsk->num_bd-1) * tsk->bd_size);
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var->bd_start = tsk->bd_pa;
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var->buffer_size = priv->maxbufsize;
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inc->incr_bytes = -(s16)sizeof(u32);
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inc->incr_dst = sizeof(u32);
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/* Reset the BDs */
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tsk->index = 0;
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tsk->outdex = 0;
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memset(tsk->bd, 0x00, tsk->num_bd * tsk->bd_size);
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/* Configure some stuff */
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bcom_set_task_pragma(tsk->tasknum, BCOM_GEN_RX_BD_PRAGMA);
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bcom_set_task_auto_start(tsk->tasknum, tsk->tasknum);
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out_8(&bcom_eng->regs->ipr[priv->initiator], priv->ipr);
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bcom_set_initiator(tsk->tasknum, priv->initiator);
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out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_rx_reset);
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void
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bcom_gen_bd_rx_release(struct bcom_task *tsk)
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{
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/* Nothing special for the GenBD tasks */
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bcom_task_free(tsk);
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_rx_release);
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extern struct bcom_task *
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bcom_gen_bd_tx_init(int queue_len, phys_addr_t fifo,
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int initiator, int ipr)
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{
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struct bcom_task *tsk;
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struct bcom_gen_bd_priv *priv;
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tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_gen_bd),
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sizeof(struct bcom_gen_bd_priv));
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if (!tsk)
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return NULL;
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tsk->flags = BCOM_FLAGS_NONE;
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priv = tsk->priv;
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priv->fifo = fifo;
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priv->initiator = initiator;
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priv->ipr = ipr;
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if (bcom_gen_bd_tx_reset(tsk)) {
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bcom_task_free(tsk);
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return NULL;
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}
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return tsk;
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_init);
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int
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bcom_gen_bd_tx_reset(struct bcom_task *tsk)
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{
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struct bcom_gen_bd_priv *priv = tsk->priv;
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struct bcom_gen_bd_tx_var *var;
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struct bcom_gen_bd_tx_inc *inc;
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/* Shutdown the task */
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bcom_disable_task(tsk->tasknum);
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/* Reset the microcode */
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var = (struct bcom_gen_bd_tx_var *) bcom_task_var(tsk->tasknum);
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inc = (struct bcom_gen_bd_tx_inc *) bcom_task_inc(tsk->tasknum);
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if (bcom_load_image(tsk->tasknum, bcom_gen_bd_tx_task))
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return -1;
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var->enable = bcom_eng->regs_base +
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offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);
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var->fifo = (u32) priv->fifo;
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var->bd_base = tsk->bd_pa;
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var->bd_last = tsk->bd_pa + ((tsk->num_bd-1) * tsk->bd_size);
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var->bd_start = tsk->bd_pa;
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inc->incr_bytes = -(s16)sizeof(u32);
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inc->incr_src = sizeof(u32);
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inc->incr_src_ma = sizeof(u8);
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/* Reset the BDs */
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tsk->index = 0;
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tsk->outdex = 0;
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memset(tsk->bd, 0x00, tsk->num_bd * tsk->bd_size);
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/* Configure some stuff */
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bcom_set_task_pragma(tsk->tasknum, BCOM_GEN_TX_BD_PRAGMA);
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bcom_set_task_auto_start(tsk->tasknum, tsk->tasknum);
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out_8(&bcom_eng->regs->ipr[priv->initiator], priv->ipr);
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bcom_set_initiator(tsk->tasknum, priv->initiator);
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out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_reset);
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void
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bcom_gen_bd_tx_release(struct bcom_task *tsk)
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{
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/* Nothing special for the GenBD tasks */
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bcom_task_free(tsk);
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_release);
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/* ---------------------------------------------------------------------
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* PSC support code
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*/
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/**
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* bcom_psc_parameters - Bestcomm initialization value table for PSC devices
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*
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* This structure is only used internally. It is a lookup table for PSC
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* specific parameters to bestcomm tasks.
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*/
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static struct bcom_psc_params {
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int rx_initiator;
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int rx_ipr;
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int tx_initiator;
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int tx_ipr;
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} bcom_psc_params[] = {
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[0] = {
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.rx_initiator = BCOM_INITIATOR_PSC1_RX,
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.rx_ipr = BCOM_IPR_PSC1_RX,
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.tx_initiator = BCOM_INITIATOR_PSC1_TX,
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.tx_ipr = BCOM_IPR_PSC1_TX,
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},
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[1] = {
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.rx_initiator = BCOM_INITIATOR_PSC2_RX,
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.rx_ipr = BCOM_IPR_PSC2_RX,
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.tx_initiator = BCOM_INITIATOR_PSC2_TX,
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.tx_ipr = BCOM_IPR_PSC2_TX,
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},
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[2] = {
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.rx_initiator = BCOM_INITIATOR_PSC3_RX,
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.rx_ipr = BCOM_IPR_PSC3_RX,
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.tx_initiator = BCOM_INITIATOR_PSC3_TX,
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.tx_ipr = BCOM_IPR_PSC3_TX,
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},
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[3] = {
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.rx_initiator = BCOM_INITIATOR_PSC4_RX,
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.rx_ipr = BCOM_IPR_PSC4_RX,
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.tx_initiator = BCOM_INITIATOR_PSC4_TX,
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.tx_ipr = BCOM_IPR_PSC4_TX,
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},
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[4] = {
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.rx_initiator = BCOM_INITIATOR_PSC5_RX,
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.rx_ipr = BCOM_IPR_PSC5_RX,
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.tx_initiator = BCOM_INITIATOR_PSC5_TX,
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.tx_ipr = BCOM_IPR_PSC5_TX,
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},
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[5] = {
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.rx_initiator = BCOM_INITIATOR_PSC6_RX,
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.rx_ipr = BCOM_IPR_PSC6_RX,
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.tx_initiator = BCOM_INITIATOR_PSC6_TX,
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.tx_ipr = BCOM_IPR_PSC6_TX,
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},
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};
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/**
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* bcom_psc_gen_bd_rx_init - Allocate a receive bcom_task for a PSC port
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* @psc_num: Number of the PSC to allocate a task for
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* @queue_len: number of buffer descriptors to allocate for the task
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* @fifo: physical address of FIFO register
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* @maxbufsize: Maximum receive data size in bytes.
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*
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* Allocate a bestcomm task structure for receiving data from a PSC.
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*/
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struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len,
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phys_addr_t fifo, int maxbufsize)
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{
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if (psc_num >= MPC52xx_PSC_MAXNUM)
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return NULL;
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return bcom_gen_bd_rx_init(queue_len, fifo,
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bcom_psc_params[psc_num].rx_initiator,
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bcom_psc_params[psc_num].rx_ipr,
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maxbufsize);
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}
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EXPORT_SYMBOL_GPL(bcom_psc_gen_bd_rx_init);
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/**
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* bcom_psc_gen_bd_tx_init - Allocate a transmit bcom_task for a PSC port
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* @psc_num: Number of the PSC to allocate a task for
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* @queue_len: number of buffer descriptors to allocate for the task
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* @fifo: physical address of FIFO register
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*
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* Allocate a bestcomm task structure for transmitting data to a PSC.
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*/
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struct bcom_task *
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bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len, phys_addr_t fifo)
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{
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struct psc;
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return bcom_gen_bd_tx_init(queue_len, fifo,
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bcom_psc_params[psc_num].tx_initiator,
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bcom_psc_params[psc_num].tx_ipr);
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}
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EXPORT_SYMBOL_GPL(bcom_psc_gen_bd_tx_init);
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MODULE_DESCRIPTION("BestComm General Buffer Descriptor tasks driver");
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MODULE_AUTHOR("Jeff Gibbons <jeff.gibbons@appspec.com>");
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MODULE_LICENSE("GPL v2");
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