a105f642ad
Echo Digital Audio Corporation had US patent US7599388B2 titled as 'System and method for high-bandwidth serial bus data transfer'. In the patent, dual-banked shared memory is used to deliver data between serial bus transmission and processor in FIFO way. The patent seems to be used for Fireworks board module. The mechanism is not compliant to synchronization based on presentation time expressed in syt field of CIP header. Fireworks board module takes care of the sequence of the number of data blocks per packet and just ignores the value of syt field. This commit takes fireworks driver to performs sequence replay for media clock recovery. As long as I tested, Audiofire 2 and 4 have a quirk to skip an isochronous cycle several thousands after starting packet transmission. The sequence replay is tested with below models: * Loud Technology Mackie 400f * Echo Audio Audiofire 12 (DSP model) * Echo Audio Audiofire 12 (FPGA model) * Echo Audio Audiofire 8 (DSP model) * Echo Audio Audiofire 8 (FPGA model) * Echo Audio Audiofire Pre8 * Echo Audio Audiofire 4 * Echo Audio Audiofire 2 Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Link: https://lore.kernel.org/r/20210531025103.17880-3-o-takashi@sakamocchi.jp Signed-off-by: Takashi Iwai <tiwai@suse.de> |
||
|---|---|---|
| .. | ||
| Makefile | ||
| fireworks.c | ||
| fireworks.h | ||
| fireworks_command.c | ||
| fireworks_hwdep.c | ||
| fireworks_midi.c | ||
| fireworks_pcm.c | ||
| fireworks_proc.c | ||
| fireworks_stream.c | ||
| fireworks_transaction.c | ||