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d889797530
* arm64/for-next/fixes: (26 commits)
arm64: mte: fix prctl(PR_GET_TAGGED_ADDR_CTRL) if TCF0=NONE
arm64: mte: Fix typo in macro definition
arm64: entry: fix EL1 debug transitions
arm64: entry: fix NMI {user, kernel}->kernel transitions
arm64: entry: fix non-NMI kernel<->kernel transitions
arm64: ptrace: prepare for EL1 irq/rcu tracking
arm64: entry: fix non-NMI user<->kernel transitions
arm64: entry: move el1 irq/nmi logic to C
arm64: entry: prepare ret_to_user for function call
arm64: entry: move enter_from_user_mode to entry-common.c
arm64: entry: mark entry code as noinstr
arm64: mark idle code as noinstr
arm64: syscall: exit userspace before unmasking exceptions
arm64: pgtable: Ensure dirty bit is preserved across pte_wrprotect()
arm64: pgtable: Fix pte_accessible()
ACPI/IORT: Fix doc warnings in iort.c
arm64/fpsimd: add <asm/insn.h> to <asm/kprobes.h> to fix fpsimd build
arm64: cpu_errata: Apply Erratum 845719 to KRYO2XX Silver
arm64: proton-pack: Add KRYO2XX silver CPUs to spectre-v2 safe-list
arm64: kpti: Add KRYO2XX gold/silver CPU cores to kpti safelist
...
# Conflicts:
# arch/arm64/include/asm/exception.h
# arch/arm64/kernel/sdei.c
90 lines
2.1 KiB
C
90 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on arch/arm/kernel/irq.c
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*
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* Copyright (C) 1992 Linus Torvalds
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* Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
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* Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
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* Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
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* Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
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* Copyright (C) 2012 ARM Ltd.
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*/
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#include <linux/irq.h>
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#include <linux/memory.h>
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#include <linux/smp.h>
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#include <linux/hardirq.h>
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#include <linux/init.h>
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#include <linux/irqchip.h>
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#include <linux/kprobes.h>
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#include <linux/scs.h>
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#include <linux/seq_file.h>
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#include <linux/vmalloc.h>
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#include <asm/daifflags.h>
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#include <asm/vmap_stack.h>
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/* Only access this in an NMI enter/exit */
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DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts);
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DEFINE_PER_CPU(unsigned long *, irq_stack_ptr);
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DECLARE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr);
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#ifdef CONFIG_SHADOW_CALL_STACK
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DEFINE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr);
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#endif
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static void init_irq_scs(void)
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{
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int cpu;
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if (!IS_ENABLED(CONFIG_SHADOW_CALL_STACK))
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return;
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for_each_possible_cpu(cpu)
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per_cpu(irq_shadow_call_stack_ptr, cpu) =
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scs_alloc(cpu_to_node(cpu));
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}
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#ifdef CONFIG_VMAP_STACK
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static void init_irq_stacks(void)
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{
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int cpu;
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unsigned long *p;
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for_each_possible_cpu(cpu) {
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p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu));
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per_cpu(irq_stack_ptr, cpu) = p;
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}
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}
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#else
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/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */
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DEFINE_PER_CPU_ALIGNED(unsigned long [IRQ_STACK_SIZE/sizeof(long)], irq_stack);
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static void init_irq_stacks(void)
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{
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int cpu;
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for_each_possible_cpu(cpu)
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per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);
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}
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#endif
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void __init init_IRQ(void)
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{
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init_irq_stacks();
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init_irq_scs();
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irqchip_init();
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if (!handle_arch_irq)
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panic("No interrupt controller found.");
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if (system_uses_irq_prio_masking()) {
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/*
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* Now that we have a stack for our IRQ handler, set
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* the PMR/PSR pair to a consistent state.
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*/
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WARN_ON(read_sysreg(daif) & PSR_A_BIT);
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local_daif_restore(DAIF_PROCCTX_NOIRQ);
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}
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}
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