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![Alexey Kardashevskiy](/assets/img/avatar_default.png)
At the moment we allow bypassing DMA ops only when we can do this for the entire RAM. However there are configs with mixed type memory where we could still allow bypassing IOMMU in most cases; POWERPC with persistent memory is one example. This adds an arch hook to determine where bypass can still work and we invoke direct DMA API. The following patch checks the bus limit on POWERPC to allow or disallow direct mapping. This adds a ARCH_HAS_DMA_MAP_DIRECT config option to make the arch_xxxx hooks no-op by default. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Christoph Hellwig <hch@lst.de>
648 lines
18 KiB
C
648 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* arch-independent dma-mapping routines
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*
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* Copyright (c) 2006 SUSE Linux Products GmbH
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* Copyright (c) 2006 Tejun Heo <teheo@suse.de>
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*/
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#include <linux/memblock.h> /* for max_pfn */
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#include <linux/acpi.h>
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#include <linux/dma-map-ops.h>
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#include <linux/export.h>
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#include <linux/gfp.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include "debug.h"
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#include "direct.h"
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/*
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* Managed DMA API
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*/
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struct dma_devres {
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size_t size;
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void *vaddr;
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dma_addr_t dma_handle;
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unsigned long attrs;
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};
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static void dmam_release(struct device *dev, void *res)
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{
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struct dma_devres *this = res;
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dma_free_attrs(dev, this->size, this->vaddr, this->dma_handle,
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this->attrs);
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}
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static int dmam_match(struct device *dev, void *res, void *match_data)
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{
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struct dma_devres *this = res, *match = match_data;
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if (this->vaddr == match->vaddr) {
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WARN_ON(this->size != match->size ||
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this->dma_handle != match->dma_handle);
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return 1;
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}
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return 0;
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}
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/**
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* dmam_free_coherent - Managed dma_free_coherent()
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* @dev: Device to free coherent memory for
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* @size: Size of allocation
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* @vaddr: Virtual address of the memory to free
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* @dma_handle: DMA handle of the memory to free
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*
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* Managed dma_free_coherent().
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*/
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void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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{
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struct dma_devres match_data = { size, vaddr, dma_handle };
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dma_free_coherent(dev, size, vaddr, dma_handle);
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WARN_ON(devres_destroy(dev, dmam_release, dmam_match, &match_data));
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}
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EXPORT_SYMBOL(dmam_free_coherent);
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/**
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* dmam_alloc_attrs - Managed dma_alloc_attrs()
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* @dev: Device to allocate non_coherent memory for
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* @size: Size of allocation
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* @dma_handle: Out argument for allocated DMA handle
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* @gfp: Allocation flags
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* @attrs: Flags in the DMA_ATTR_* namespace.
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*
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* Managed dma_alloc_attrs(). Memory allocated using this function will be
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* automatically released on driver detach.
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*
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* RETURNS:
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* Pointer to allocated memory on success, NULL on failure.
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*/
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void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs)
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{
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struct dma_devres *dr;
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void *vaddr;
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dr = devres_alloc(dmam_release, sizeof(*dr), gfp);
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if (!dr)
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return NULL;
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vaddr = dma_alloc_attrs(dev, size, dma_handle, gfp, attrs);
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if (!vaddr) {
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devres_free(dr);
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return NULL;
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}
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dr->vaddr = vaddr;
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dr->dma_handle = *dma_handle;
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dr->size = size;
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dr->attrs = attrs;
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devres_add(dev, dr);
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return vaddr;
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}
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EXPORT_SYMBOL(dmam_alloc_attrs);
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static bool dma_go_direct(struct device *dev, dma_addr_t mask,
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const struct dma_map_ops *ops)
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{
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if (likely(!ops))
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return true;
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#ifdef CONFIG_DMA_OPS_BYPASS
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if (dev->dma_ops_bypass)
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return min_not_zero(mask, dev->bus_dma_limit) >=
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dma_direct_get_required_mask(dev);
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#endif
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return false;
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}
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/*
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* Check if the devices uses a direct mapping for streaming DMA operations.
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* This allows IOMMU drivers to set a bypass mode if the DMA mask is large
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* enough.
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*/
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static inline bool dma_alloc_direct(struct device *dev,
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const struct dma_map_ops *ops)
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{
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return dma_go_direct(dev, dev->coherent_dma_mask, ops);
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}
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static inline bool dma_map_direct(struct device *dev,
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const struct dma_map_ops *ops)
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{
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return dma_go_direct(dev, *dev->dma_mask, ops);
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}
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dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page,
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size_t offset, size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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dma_addr_t addr;
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BUG_ON(!valid_dma_direction(dir));
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if (WARN_ON_ONCE(!dev->dma_mask))
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return DMA_MAPPING_ERROR;
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if (dma_map_direct(dev, ops) ||
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arch_dma_map_page_direct(dev, page_to_phys(page) + offset + size))
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addr = dma_direct_map_page(dev, page, offset, size, dir, attrs);
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else
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addr = ops->map_page(dev, page, offset, size, dir, attrs);
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debug_dma_map_page(dev, page, offset, size, dir, addr);
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return addr;
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}
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EXPORT_SYMBOL(dma_map_page_attrs);
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void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_map_direct(dev, ops) ||
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arch_dma_unmap_page_direct(dev, addr + size))
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dma_direct_unmap_page(dev, addr, size, dir, attrs);
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else if (ops->unmap_page)
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ops->unmap_page(dev, addr, size, dir, attrs);
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debug_dma_unmap_page(dev, addr, size, dir);
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}
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EXPORT_SYMBOL(dma_unmap_page_attrs);
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/*
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* dma_maps_sg_attrs returns 0 on error and > 0 on success.
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* It should never return a value < 0.
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*/
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int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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int ents;
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BUG_ON(!valid_dma_direction(dir));
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if (WARN_ON_ONCE(!dev->dma_mask))
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return 0;
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if (dma_map_direct(dev, ops) ||
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arch_dma_map_sg_direct(dev, sg, nents))
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ents = dma_direct_map_sg(dev, sg, nents, dir, attrs);
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else
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ents = ops->map_sg(dev, sg, nents, dir, attrs);
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BUG_ON(ents < 0);
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debug_dma_map_sg(dev, sg, nents, ents, dir);
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return ents;
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}
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EXPORT_SYMBOL(dma_map_sg_attrs);
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void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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debug_dma_unmap_sg(dev, sg, nents, dir);
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if (dma_map_direct(dev, ops) ||
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arch_dma_unmap_sg_direct(dev, sg, nents))
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dma_direct_unmap_sg(dev, sg, nents, dir, attrs);
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else if (ops->unmap_sg)
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ops->unmap_sg(dev, sg, nents, dir, attrs);
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}
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EXPORT_SYMBOL(dma_unmap_sg_attrs);
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dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr,
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size_t size, enum dma_data_direction dir, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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dma_addr_t addr = DMA_MAPPING_ERROR;
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BUG_ON(!valid_dma_direction(dir));
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if (WARN_ON_ONCE(!dev->dma_mask))
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return DMA_MAPPING_ERROR;
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/* Don't allow RAM to be mapped */
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if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr))))
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return DMA_MAPPING_ERROR;
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if (dma_map_direct(dev, ops))
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addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs);
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else if (ops->map_resource)
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addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
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debug_dma_map_resource(dev, phys_addr, size, dir, addr);
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return addr;
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}
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EXPORT_SYMBOL(dma_map_resource);
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void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (!dma_map_direct(dev, ops) && ops->unmap_resource)
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ops->unmap_resource(dev, addr, size, dir, attrs);
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debug_dma_unmap_resource(dev, addr, size, dir);
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}
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EXPORT_SYMBOL(dma_unmap_resource);
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void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size,
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enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_map_direct(dev, ops))
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dma_direct_sync_single_for_cpu(dev, addr, size, dir);
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else if (ops->sync_single_for_cpu)
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ops->sync_single_for_cpu(dev, addr, size, dir);
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debug_dma_sync_single_for_cpu(dev, addr, size, dir);
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}
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EXPORT_SYMBOL(dma_sync_single_for_cpu);
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void dma_sync_single_for_device(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_map_direct(dev, ops))
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dma_direct_sync_single_for_device(dev, addr, size, dir);
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else if (ops->sync_single_for_device)
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ops->sync_single_for_device(dev, addr, size, dir);
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debug_dma_sync_single_for_device(dev, addr, size, dir);
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}
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EXPORT_SYMBOL(dma_sync_single_for_device);
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void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_map_direct(dev, ops))
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dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir);
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else if (ops->sync_sg_for_cpu)
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ops->sync_sg_for_cpu(dev, sg, nelems, dir);
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debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
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}
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EXPORT_SYMBOL(dma_sync_sg_for_cpu);
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void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_map_direct(dev, ops))
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dma_direct_sync_sg_for_device(dev, sg, nelems, dir);
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else if (ops->sync_sg_for_device)
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ops->sync_sg_for_device(dev, sg, nelems, dir);
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debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
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}
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EXPORT_SYMBOL(dma_sync_sg_for_device);
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/*
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* The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
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* that the intention is to allow exporting memory allocated via the
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* coherent DMA APIs through the dma_buf API, which only accepts a
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* scattertable. This presents a couple of problems:
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* 1. Not all memory allocated via the coherent DMA APIs is backed by
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* a struct page
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* 2. Passing coherent DMA memory into the streaming APIs is not allowed
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* as we will try to flush the memory through a different alias to that
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* actually being used (and the flushes are redundant.)
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*/
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int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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if (dma_alloc_direct(dev, ops))
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return dma_direct_get_sgtable(dev, sgt, cpu_addr, dma_addr,
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size, attrs);
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if (!ops->get_sgtable)
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return -ENXIO;
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return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, attrs);
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}
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EXPORT_SYMBOL(dma_get_sgtable_attrs);
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#ifdef CONFIG_MMU
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/*
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* Return the page attributes used for mapping dma_alloc_* memory, either in
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* kernel space if remapping is needed, or to userspace through dma_mmap_*.
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*/
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pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs)
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{
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if (force_dma_unencrypted(dev))
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prot = pgprot_decrypted(prot);
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if (dev_is_dma_coherent(dev))
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return prot;
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#ifdef CONFIG_ARCH_HAS_DMA_WRITE_COMBINE
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if (attrs & DMA_ATTR_WRITE_COMBINE)
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return pgprot_writecombine(prot);
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#endif
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return pgprot_dmacoherent(prot);
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}
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#endif /* CONFIG_MMU */
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/**
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* dma_can_mmap - check if a given device supports dma_mmap_*
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* @dev: device to check
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*
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* Returns %true if @dev supports dma_mmap_coherent() and dma_mmap_attrs() to
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* map DMA allocations to userspace.
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*/
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bool dma_can_mmap(struct device *dev)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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if (dma_alloc_direct(dev, ops))
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return dma_direct_can_mmap(dev);
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return ops->mmap != NULL;
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}
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EXPORT_SYMBOL_GPL(dma_can_mmap);
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/**
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* dma_mmap_attrs - map a coherent DMA allocation into user space
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @vma: vm_area_struct describing requested user mapping
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* @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
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* @dma_addr: device-view address returned from dma_alloc_attrs
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* @size: size of memory originally requested in dma_alloc_attrs
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* @attrs: attributes of mapping properties requested in dma_alloc_attrs
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*
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* Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user
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* space. The coherent DMA buffer must not be freed by the driver until the
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* user space mapping has been released.
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*/
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int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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if (dma_alloc_direct(dev, ops))
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return dma_direct_mmap(dev, vma, cpu_addr, dma_addr, size,
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attrs);
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if (!ops->mmap)
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return -ENXIO;
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return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
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}
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EXPORT_SYMBOL(dma_mmap_attrs);
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u64 dma_get_required_mask(struct device *dev)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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if (dma_alloc_direct(dev, ops))
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return dma_direct_get_required_mask(dev);
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if (ops->get_required_mask)
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return ops->get_required_mask(dev);
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/*
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* We require every DMA ops implementation to at least support a 32-bit
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* DMA mask (and use bounce buffering if that isn't supported in
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* hardware). As the direct mapping code has its own routine to
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* actually report an optimal mask we default to 32-bit here as that
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* is the right thing for most IOMMUs, and at least not actively
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* harmful in general.
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*/
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return DMA_BIT_MASK(32);
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}
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EXPORT_SYMBOL_GPL(dma_get_required_mask);
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void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flag, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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void *cpu_addr;
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WARN_ON_ONCE(!dev->coherent_dma_mask);
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if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
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return cpu_addr;
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/* let the implementation decide on the zone to allocate from: */
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flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
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if (dma_alloc_direct(dev, ops))
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cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs);
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else if (ops->alloc)
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cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
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else
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return NULL;
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debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
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return cpu_addr;
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}
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EXPORT_SYMBOL(dma_alloc_attrs);
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void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
|
|
return;
|
|
/*
|
|
* On non-coherent platforms which implement DMA-coherent buffers via
|
|
* non-cacheable remaps, ops->free() may call vunmap(). Thus getting
|
|
* this far in IRQ context is a) at risk of a BUG_ON() or trying to
|
|
* sleep on some machines, and b) an indication that the driver is
|
|
* probably misusing the coherent API anyway.
|
|
*/
|
|
WARN_ON(irqs_disabled());
|
|
|
|
if (!cpu_addr)
|
|
return;
|
|
|
|
debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
|
|
if (dma_alloc_direct(dev, ops))
|
|
dma_direct_free(dev, size, cpu_addr, dma_handle, attrs);
|
|
else if (ops->free)
|
|
ops->free(dev, size, cpu_addr, dma_handle, attrs);
|
|
}
|
|
EXPORT_SYMBOL(dma_free_attrs);
|
|
|
|
struct page *dma_alloc_pages(struct device *dev, size_t size,
|
|
dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
|
|
{
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
struct page *page;
|
|
|
|
if (WARN_ON_ONCE(!dev->coherent_dma_mask))
|
|
return NULL;
|
|
if (WARN_ON_ONCE(gfp & (__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM)))
|
|
return NULL;
|
|
|
|
size = PAGE_ALIGN(size);
|
|
if (dma_alloc_direct(dev, ops))
|
|
page = dma_direct_alloc_pages(dev, size, dma_handle, dir, gfp);
|
|
else if (ops->alloc_pages)
|
|
page = ops->alloc_pages(dev, size, dma_handle, dir, gfp);
|
|
else
|
|
return NULL;
|
|
|
|
debug_dma_map_page(dev, page, 0, size, dir, *dma_handle);
|
|
|
|
return page;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_alloc_pages);
|
|
|
|
void dma_free_pages(struct device *dev, size_t size, struct page *page,
|
|
dma_addr_t dma_handle, enum dma_data_direction dir)
|
|
{
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
size = PAGE_ALIGN(size);
|
|
debug_dma_unmap_page(dev, dma_handle, size, dir);
|
|
|
|
if (dma_alloc_direct(dev, ops))
|
|
dma_direct_free_pages(dev, size, page, dma_handle, dir);
|
|
else if (ops->free_pages)
|
|
ops->free_pages(dev, size, page, dma_handle, dir);
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_free_pages);
|
|
|
|
void *dma_alloc_noncoherent(struct device *dev, size_t size,
|
|
dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
|
|
{
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
void *vaddr;
|
|
|
|
if (!ops || !ops->alloc_noncoherent) {
|
|
struct page *page;
|
|
|
|
page = dma_alloc_pages(dev, size, dma_handle, dir, gfp);
|
|
if (!page)
|
|
return NULL;
|
|
return page_address(page);
|
|
}
|
|
|
|
size = PAGE_ALIGN(size);
|
|
vaddr = ops->alloc_noncoherent(dev, size, dma_handle, dir, gfp);
|
|
if (vaddr)
|
|
debug_dma_map_page(dev, virt_to_page(vaddr), 0, size, dir,
|
|
*dma_handle);
|
|
return vaddr;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_alloc_noncoherent);
|
|
|
|
void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
|
|
dma_addr_t dma_handle, enum dma_data_direction dir)
|
|
{
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
if (!ops || !ops->free_noncoherent) {
|
|
dma_free_pages(dev, size, virt_to_page(vaddr), dma_handle, dir);
|
|
return;
|
|
}
|
|
|
|
size = PAGE_ALIGN(size);
|
|
debug_dma_unmap_page(dev, dma_handle, size, dir);
|
|
ops->free_noncoherent(dev, size, vaddr, dma_handle, dir);
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_free_noncoherent);
|
|
|
|
int dma_supported(struct device *dev, u64 mask)
|
|
{
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
/*
|
|
* ->dma_supported sets the bypass flag, so we must always call
|
|
* into the method here unless the device is truly direct mapped.
|
|
*/
|
|
if (!ops)
|
|
return dma_direct_supported(dev, mask);
|
|
if (!ops->dma_supported)
|
|
return 1;
|
|
return ops->dma_supported(dev, mask);
|
|
}
|
|
EXPORT_SYMBOL(dma_supported);
|
|
|
|
#ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
|
|
void arch_dma_set_mask(struct device *dev, u64 mask);
|
|
#else
|
|
#define arch_dma_set_mask(dev, mask) do { } while (0)
|
|
#endif
|
|
|
|
int dma_set_mask(struct device *dev, u64 mask)
|
|
{
|
|
/*
|
|
* Truncate the mask to the actually supported dma_addr_t width to
|
|
* avoid generating unsupportable addresses.
|
|
*/
|
|
mask = (dma_addr_t)mask;
|
|
|
|
if (!dev->dma_mask || !dma_supported(dev, mask))
|
|
return -EIO;
|
|
|
|
arch_dma_set_mask(dev, mask);
|
|
*dev->dma_mask = mask;
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(dma_set_mask);
|
|
|
|
#ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
|
|
int dma_set_coherent_mask(struct device *dev, u64 mask)
|
|
{
|
|
/*
|
|
* Truncate the mask to the actually supported dma_addr_t width to
|
|
* avoid generating unsupportable addresses.
|
|
*/
|
|
mask = (dma_addr_t)mask;
|
|
|
|
if (!dma_supported(dev, mask))
|
|
return -EIO;
|
|
|
|
dev->coherent_dma_mask = mask;
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(dma_set_coherent_mask);
|
|
#endif
|
|
|
|
size_t dma_max_mapping_size(struct device *dev)
|
|
{
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
size_t size = SIZE_MAX;
|
|
|
|
if (dma_map_direct(dev, ops))
|
|
size = dma_direct_max_mapping_size(dev);
|
|
else if (ops && ops->max_mapping_size)
|
|
size = ops->max_mapping_size(dev);
|
|
|
|
return size;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_max_mapping_size);
|
|
|
|
bool dma_need_sync(struct device *dev, dma_addr_t dma_addr)
|
|
{
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
if (dma_map_direct(dev, ops))
|
|
return dma_direct_need_sync(dev, dma_addr);
|
|
return ops->sync_single_for_cpu || ops->sync_single_for_device;
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_need_sync);
|
|
|
|
unsigned long dma_get_merge_boundary(struct device *dev)
|
|
{
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
if (!ops || !ops->get_merge_boundary)
|
|
return 0; /* can't merge */
|
|
|
|
return ops->get_merge_boundary(dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(dma_get_merge_boundary);
|