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A quite large set of SoC updates this cycle. In no particular order: - Multi-cluster power management for Samsung Exynos, adding support for big.LITTLE CPU switching on EXYNOS5 - SMP support for Marvell Armada 375 and 38x - SMP rework on Allwinner A31 - Xilinx Zynq support for SOC_BUS, big endian - Marvell orion5x platform cleanup, modernizing the implementation and moving to DT. - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so that their platform can be enabled in the same kernel binary as most of the other v7 platforms in the tree. \o/ The work isn't quite complete, there's some driver fixes still needed, but the basics now work. New SoC support added: - Freescale i.MX6SX - LSI Axxia AXM55xx SoCs - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800 - STi STIH407 Plus a large set of various smaller updates for different platforms. I'm probably missing some important one here. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTjOKWAAoJEIwa5zzehBx36aEP/2vTD7x9FC59FACNHJ8iO7aw 0ebTgBBjI1Np6X18O+M7URbxV5TaBgwpUm/NDN86p03MpQ2eOXr8r47qVxe/HhZs AdlTvzgE6QwxcVL/HeCKKUEN3BPH74+TZgFl9I5aSzNjpR39xETeK1aWP/ZiAl/q /lGRZAQ59+c7Ung00Hg0g2YDxH9WFpK50Nj90ROnyjKSFkhIYngXYVpZB3maOypq Pgib/U8IraKZ52oGJw3yinSoORr7FdcUdAGWGTz/lQdNL/jYDfQ6GkRW2oblWXdt 3Xvj9UW6NmkbMICucMvFuuW1nXAgutZuTp9w7mBxsiUlYepxPv/DXM6yiI1WGlEb BeVOmOreNeN2nT6avv/uUhk3Osq63Jn9x8cz5y+7/lgWQwllh3/c+G01RotvgJEQ vpQq5ps9fMxIAMaNP6N/YqMJI1IOrBj0iXxaZEDw3VYM/k4lSvtb3VXP9c/rqApu U4i6hpSIGzrraU4NrjndYPndcLeNOVZbByETQKosZXuCo6G1sb7FstNSkzI9vSo8 O/pujIVUfYyBW82GzZGDw+aa7DWA29FPeUQ3p+sj5MSCg051xXT8h6QwqMo2K/zY 5ATs/qo6w7zH/Ou9rtHTRynCIb0GQJThDSlWtuXFedUF9quEltS+TDz/2o+dWtGJ yBFGKDRuBB20D36w9xqg =6LYI -----END PGP SIGNATURE----- Merge tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull part one of ARM SoC updates from Olof Johansson: "A quite large set of SoC updates this cycle. In no particular order: - Multi-cluster power management for Samsung Exynos, adding support for big.LITTLE CPU switching on EXYNOS5 - SMP support for Marvell Armada 375 and 38x - SMP rework on Allwinner A31 - Xilinx Zynq support for SOC_BUS, big endian - Marvell orion5x platform cleanup, modernizing the implementation and moving to DT. - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so that their platform can be enabled in the same kernel binary as most of the other v7 platforms in the tree. \o/ The work isn't quite complete, there's some driver fixes still needed, but the basics now work. New SoC support added: - Freescale i.MX6SX - LSI Axxia AXM55xx SoCs - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800 - STi STIH407 plus a large set of various smaller updates for different platforms. I'm probably missing some important one here" * tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits) ARM: exynos: don't run exynos4 l2x0 setup on other platforms ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug ARM: EXYNOS: mcpm rename the power_down_finish ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC ARM: EXYNOS: Enable multi-platform build support ARM: EXYNOS: Consolidate Kconfig entries ARM: EXYNOS: Add support for EXYNOS5410 SoC ARM: EXYNOS: Support secondary CPU boot of Exynos3250 ARM: EXYNOS: Add Exynos3250 SoC ID ARM: EXYNOS: Add 5800 SoC support ARM: EXYNOS: initial board support for exynos5260 SoC clk: exynos5410: register clocks using common clock framework ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084 ARM: sunxi: allow building without reset controller Documentation: devicetree: arm: sort enable-method entries ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ...
87 lines
2.7 KiB
C
87 lines
2.7 KiB
C
#ifndef __ARCH_ORION5X_COMMON_H
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#define __ARCH_ORION5X_COMMON_H
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#include <linux/reboot.h>
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struct dsa_platform_data;
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struct mv643xx_eth_platform_data;
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struct mv_sata_platform_data;
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#define ORION_MBUS_PCIE_MEM_TARGET 0x04
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#define ORION_MBUS_PCIE_MEM_ATTR 0x59
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#define ORION_MBUS_PCIE_IO_TARGET 0x04
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#define ORION_MBUS_PCIE_IO_ATTR 0x51
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#define ORION_MBUS_PCIE_WA_TARGET 0x04
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#define ORION_MBUS_PCIE_WA_ATTR 0x79
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#define ORION_MBUS_PCI_MEM_TARGET 0x03
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#define ORION_MBUS_PCI_MEM_ATTR 0x59
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#define ORION_MBUS_PCI_IO_TARGET 0x03
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#define ORION_MBUS_PCI_IO_ATTR 0x51
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#define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01
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#define ORION_MBUS_DEVBUS_BOOT_ATTR 0x0f
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#define ORION_MBUS_DEVBUS_TARGET(cs) 0x01
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#define ORION_MBUS_DEVBUS_ATTR(cs) (~(1 << cs))
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#define ORION_MBUS_SRAM_TARGET 0x09
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#define ORION_MBUS_SRAM_ATTR 0x00
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/*
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* Basic Orion init functions used early by machine-setup.
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*/
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void orion5x_map_io(void);
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void orion5x_init_early(void);
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void orion5x_init_irq(void);
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void orion5x_init(void);
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void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
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void clk_init(void);
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extern int orion5x_tclk;
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extern void orion5x_timer_init(void);
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void orion5x_setup_wins(void);
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void orion5x_ehci0_init(void);
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void orion5x_ehci1_init(void);
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void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
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void orion5x_eth_switch_init(struct dsa_platform_data *d, int irq);
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void orion5x_i2c_init(void);
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void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
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void orion5x_spi_init(void);
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void orion5x_uart0_init(void);
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void orion5x_uart1_init(void);
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void orion5x_xor_init(void);
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void orion5x_restart(enum reboot_mode, const char *);
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/*
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* PCIe/PCI functions.
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*/
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struct pci_bus;
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struct pci_sys_data;
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struct pci_dev;
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void orion5x_pcie_id(u32 *dev, u32 *rev);
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void orion5x_pci_disable(void);
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void orion5x_pci_set_cardbus_mode(void);
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int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
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struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
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int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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struct meminfo;
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struct tag;
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extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
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#ifdef CONFIG_MACH_MSS2_DT
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extern void mss2_init(void);
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#else
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static inline void mss2_init(void) {}
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#endif
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/*****************************************************************************
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* Helpers to access Orion registers
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****************************************************************************/
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/*
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* These are not preempt-safe. Locks, if needed, must be taken
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* care of by the caller.
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*/
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#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
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#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
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#endif
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