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![Jacek Lawrynowicz](/assets/img/avatar_default.png)
Remove job_done thread and replace it with generic callback based mechanism. Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231113170252.758137-6-jacek.lawrynowicz@linux.intel.com
577 lines
15 KiB
C
577 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2020-2023 Intel Corporation
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*/
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#include <linux/genalloc.h>
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#include <linux/highmem.h>
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#include <linux/pm_runtime.h>
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#include <linux/wait.h>
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#include "ivpu_drv.h"
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#include "ivpu_gem.h"
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#include "ivpu_hw.h"
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#include "ivpu_hw_reg_io.h"
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#include "ivpu_ipc.h"
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#include "ivpu_jsm_msg.h"
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#include "ivpu_pm.h"
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#define IPC_MAX_RX_MSG 128
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struct ivpu_ipc_tx_buf {
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struct ivpu_ipc_hdr ipc;
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struct vpu_jsm_msg jsm;
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};
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static void ivpu_ipc_msg_dump(struct ivpu_device *vdev, char *c,
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struct ivpu_ipc_hdr *ipc_hdr, u32 vpu_addr)
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{
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ivpu_dbg(vdev, IPC,
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"%s: vpu:0x%x (data_addr:0x%08x, data_size:0x%x, channel:0x%x, src_node:0x%x, dst_node:0x%x, status:0x%x)",
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c, vpu_addr, ipc_hdr->data_addr, ipc_hdr->data_size, ipc_hdr->channel,
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ipc_hdr->src_node, ipc_hdr->dst_node, ipc_hdr->status);
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}
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static void ivpu_jsm_msg_dump(struct ivpu_device *vdev, char *c,
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struct vpu_jsm_msg *jsm_msg, u32 vpu_addr)
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{
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u32 *payload = (u32 *)&jsm_msg->payload;
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ivpu_dbg(vdev, JSM,
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"%s: vpu:0x%08x (type:%s, status:0x%x, id: 0x%x, result: 0x%x, payload:0x%x 0x%x 0x%x 0x%x 0x%x)\n",
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c, vpu_addr, ivpu_jsm_msg_type_to_str(jsm_msg->type),
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jsm_msg->status, jsm_msg->request_id, jsm_msg->result,
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payload[0], payload[1], payload[2], payload[3], payload[4]);
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}
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static void
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ivpu_ipc_rx_mark_free(struct ivpu_device *vdev, struct ivpu_ipc_hdr *ipc_hdr,
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struct vpu_jsm_msg *jsm_msg)
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{
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ipc_hdr->status = IVPU_IPC_HDR_FREE;
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if (jsm_msg)
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jsm_msg->status = VPU_JSM_MSG_FREE;
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wmb(); /* Flush WC buffers for message statuses */
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}
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static void ivpu_ipc_mem_fini(struct ivpu_device *vdev)
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{
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struct ivpu_ipc_info *ipc = vdev->ipc;
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ivpu_bo_free_internal(ipc->mem_rx);
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ivpu_bo_free_internal(ipc->mem_tx);
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}
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static int
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ivpu_ipc_tx_prepare(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
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struct vpu_jsm_msg *req)
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{
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struct ivpu_ipc_info *ipc = vdev->ipc;
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struct ivpu_ipc_tx_buf *tx_buf;
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u32 tx_buf_vpu_addr;
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u32 jsm_vpu_addr;
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tx_buf_vpu_addr = gen_pool_alloc(ipc->mm_tx, sizeof(*tx_buf));
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if (!tx_buf_vpu_addr) {
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ivpu_err_ratelimited(vdev, "Failed to reserve IPC buffer, size %ld\n",
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sizeof(*tx_buf));
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return -ENOMEM;
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}
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tx_buf = ivpu_to_cpu_addr(ipc->mem_tx, tx_buf_vpu_addr);
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if (drm_WARN_ON(&vdev->drm, !tx_buf)) {
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gen_pool_free(ipc->mm_tx, tx_buf_vpu_addr, sizeof(*tx_buf));
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return -EIO;
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}
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jsm_vpu_addr = tx_buf_vpu_addr + offsetof(struct ivpu_ipc_tx_buf, jsm);
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if (tx_buf->ipc.status != IVPU_IPC_HDR_FREE)
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ivpu_warn_ratelimited(vdev, "IPC message vpu:0x%x not released by firmware\n",
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tx_buf_vpu_addr);
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if (tx_buf->jsm.status != VPU_JSM_MSG_FREE)
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ivpu_warn_ratelimited(vdev, "JSM message vpu:0x%x not released by firmware\n",
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jsm_vpu_addr);
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memset(tx_buf, 0, sizeof(*tx_buf));
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tx_buf->ipc.data_addr = jsm_vpu_addr;
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/* TODO: Set data_size to actual JSM message size, not union of all messages */
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tx_buf->ipc.data_size = sizeof(*req);
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tx_buf->ipc.channel = cons->channel;
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tx_buf->ipc.src_node = 0;
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tx_buf->ipc.dst_node = 1;
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tx_buf->ipc.status = IVPU_IPC_HDR_ALLOCATED;
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tx_buf->jsm.type = req->type;
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tx_buf->jsm.status = VPU_JSM_MSG_ALLOCATED;
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tx_buf->jsm.payload = req->payload;
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req->request_id = atomic_inc_return(&ipc->request_id);
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tx_buf->jsm.request_id = req->request_id;
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cons->request_id = req->request_id;
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wmb(); /* Flush WC buffers for IPC, JSM msgs */
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cons->tx_vpu_addr = tx_buf_vpu_addr;
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ivpu_jsm_msg_dump(vdev, "TX", &tx_buf->jsm, jsm_vpu_addr);
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ivpu_ipc_msg_dump(vdev, "TX", &tx_buf->ipc, tx_buf_vpu_addr);
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return 0;
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}
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static void ivpu_ipc_tx_release(struct ivpu_device *vdev, u32 vpu_addr)
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{
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struct ivpu_ipc_info *ipc = vdev->ipc;
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if (vpu_addr)
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gen_pool_free(ipc->mm_tx, vpu_addr, sizeof(struct ivpu_ipc_tx_buf));
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}
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static void ivpu_ipc_tx(struct ivpu_device *vdev, u32 vpu_addr)
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{
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ivpu_hw_reg_ipc_tx_set(vdev, vpu_addr);
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}
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static void
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ivpu_ipc_rx_msg_add(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
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struct ivpu_ipc_hdr *ipc_hdr, struct vpu_jsm_msg *jsm_msg)
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{
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struct ivpu_ipc_info *ipc = vdev->ipc;
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struct ivpu_ipc_rx_msg *rx_msg;
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lockdep_assert_held(&ipc->cons_lock);
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lockdep_assert_irqs_disabled();
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rx_msg = kzalloc(sizeof(*rx_msg), GFP_ATOMIC);
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if (!rx_msg) {
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ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
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return;
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}
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atomic_inc(&ipc->rx_msg_count);
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rx_msg->ipc_hdr = ipc_hdr;
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rx_msg->jsm_msg = jsm_msg;
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rx_msg->callback = cons->rx_callback;
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if (rx_msg->callback) {
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list_add_tail(&rx_msg->link, &ipc->cb_msg_list);
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} else {
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spin_lock(&cons->rx_lock);
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list_add_tail(&rx_msg->link, &cons->rx_msg_list);
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spin_unlock(&cons->rx_lock);
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wake_up(&cons->rx_msg_wq);
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}
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}
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static void
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ivpu_ipc_rx_msg_del(struct ivpu_device *vdev, struct ivpu_ipc_rx_msg *rx_msg)
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{
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list_del(&rx_msg->link);
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ivpu_ipc_rx_mark_free(vdev, rx_msg->ipc_hdr, rx_msg->jsm_msg);
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atomic_dec(&vdev->ipc->rx_msg_count);
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kfree(rx_msg);
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}
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void ivpu_ipc_consumer_add(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
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u32 channel, ivpu_ipc_rx_callback_t rx_callback)
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{
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struct ivpu_ipc_info *ipc = vdev->ipc;
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INIT_LIST_HEAD(&cons->link);
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cons->channel = channel;
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cons->tx_vpu_addr = 0;
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cons->request_id = 0;
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cons->aborted = false;
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cons->rx_callback = rx_callback;
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spin_lock_init(&cons->rx_lock);
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INIT_LIST_HEAD(&cons->rx_msg_list);
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init_waitqueue_head(&cons->rx_msg_wq);
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spin_lock_irq(&ipc->cons_lock);
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list_add_tail(&cons->link, &ipc->cons_list);
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spin_unlock_irq(&ipc->cons_lock);
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}
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void ivpu_ipc_consumer_del(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons)
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{
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struct ivpu_ipc_info *ipc = vdev->ipc;
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struct ivpu_ipc_rx_msg *rx_msg, *r;
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spin_lock_irq(&ipc->cons_lock);
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list_del(&cons->link);
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spin_unlock_irq(&ipc->cons_lock);
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spin_lock_irq(&cons->rx_lock);
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list_for_each_entry_safe(rx_msg, r, &cons->rx_msg_list, link)
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ivpu_ipc_rx_msg_del(vdev, rx_msg);
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spin_unlock_irq(&cons->rx_lock);
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ivpu_ipc_tx_release(vdev, cons->tx_vpu_addr);
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}
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static int
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ivpu_ipc_send(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons, struct vpu_jsm_msg *req)
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{
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struct ivpu_ipc_info *ipc = vdev->ipc;
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int ret;
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mutex_lock(&ipc->lock);
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if (!ipc->on) {
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ret = -EAGAIN;
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goto unlock;
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}
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ret = ivpu_ipc_tx_prepare(vdev, cons, req);
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if (ret)
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goto unlock;
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ivpu_ipc_tx(vdev, cons->tx_vpu_addr);
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unlock:
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mutex_unlock(&ipc->lock);
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return ret;
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}
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static bool ivpu_ipc_rx_need_wakeup(struct ivpu_ipc_consumer *cons)
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{
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bool ret;
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spin_lock_irq(&cons->rx_lock);
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ret = !list_empty(&cons->rx_msg_list) || cons->aborted;
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spin_unlock_irq(&cons->rx_lock);
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return ret;
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}
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int ivpu_ipc_receive(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
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struct ivpu_ipc_hdr *ipc_buf,
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struct vpu_jsm_msg *jsm_msg, unsigned long timeout_ms)
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{
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struct ivpu_ipc_rx_msg *rx_msg;
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int wait_ret, ret = 0;
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if (drm_WARN_ONCE(&vdev->drm, cons->rx_callback, "Consumer works only in async mode\n"))
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return -EINVAL;
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wait_ret = wait_event_timeout(cons->rx_msg_wq,
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ivpu_ipc_rx_need_wakeup(cons),
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msecs_to_jiffies(timeout_ms));
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if (wait_ret == 0)
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return -ETIMEDOUT;
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spin_lock_irq(&cons->rx_lock);
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if (cons->aborted) {
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spin_unlock_irq(&cons->rx_lock);
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return -ECANCELED;
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}
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rx_msg = list_first_entry_or_null(&cons->rx_msg_list, struct ivpu_ipc_rx_msg, link);
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if (!rx_msg) {
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spin_unlock_irq(&cons->rx_lock);
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return -EAGAIN;
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}
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if (ipc_buf)
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memcpy(ipc_buf, rx_msg->ipc_hdr, sizeof(*ipc_buf));
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if (rx_msg->jsm_msg) {
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u32 size = min_t(int, rx_msg->ipc_hdr->data_size, sizeof(*jsm_msg));
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if (rx_msg->jsm_msg->result != VPU_JSM_STATUS_SUCCESS) {
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ivpu_dbg(vdev, IPC, "IPC resp result error: %d\n", rx_msg->jsm_msg->result);
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ret = -EBADMSG;
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}
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if (jsm_msg)
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memcpy(jsm_msg, rx_msg->jsm_msg, size);
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}
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ivpu_ipc_rx_msg_del(vdev, rx_msg);
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spin_unlock_irq(&cons->rx_lock);
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return ret;
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}
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static int
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ivpu_ipc_send_receive_internal(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
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enum vpu_ipc_msg_type expected_resp_type,
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struct vpu_jsm_msg *resp, u32 channel,
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unsigned long timeout_ms)
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{
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struct ivpu_ipc_consumer cons;
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int ret;
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ivpu_ipc_consumer_add(vdev, &cons, channel, NULL);
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ret = ivpu_ipc_send(vdev, &cons, req);
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if (ret) {
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ivpu_warn_ratelimited(vdev, "IPC send failed: %d\n", ret);
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goto consumer_del;
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}
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ret = ivpu_ipc_receive(vdev, &cons, NULL, resp, timeout_ms);
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if (ret) {
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ivpu_warn_ratelimited(vdev, "IPC receive failed: type %s, ret %d\n",
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ivpu_jsm_msg_type_to_str(req->type), ret);
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goto consumer_del;
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}
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if (resp->type != expected_resp_type) {
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ivpu_warn_ratelimited(vdev, "Invalid JSM response type: 0x%x\n", resp->type);
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ret = -EBADE;
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}
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consumer_del:
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ivpu_ipc_consumer_del(vdev, &cons);
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return ret;
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}
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int ivpu_ipc_send_receive_active(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
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enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp,
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u32 channel, unsigned long timeout_ms)
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{
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struct vpu_jsm_msg hb_req = { .type = VPU_JSM_MSG_QUERY_ENGINE_HB };
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struct vpu_jsm_msg hb_resp;
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int ret, hb_ret;
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drm_WARN_ON(&vdev->drm, pm_runtime_status_suspended(vdev->drm.dev));
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ret = ivpu_ipc_send_receive_internal(vdev, req, expected_resp, resp, channel, timeout_ms);
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if (ret != -ETIMEDOUT)
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return ret;
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hb_ret = ivpu_ipc_send_receive_internal(vdev, &hb_req, VPU_JSM_MSG_QUERY_ENGINE_HB_DONE,
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&hb_resp, VPU_IPC_CHAN_ASYNC_CMD,
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vdev->timeout.jsm);
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if (hb_ret == -ETIMEDOUT) {
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ivpu_hw_diagnose_failure(vdev);
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ivpu_pm_schedule_recovery(vdev);
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}
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return ret;
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}
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int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
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enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp,
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u32 channel, unsigned long timeout_ms)
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{
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int ret;
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ret = ivpu_rpm_get(vdev);
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if (ret < 0)
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return ret;
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ret = ivpu_ipc_send_receive_active(vdev, req, expected_resp, resp, channel, timeout_ms);
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ivpu_rpm_put(vdev);
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return ret;
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}
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static bool
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ivpu_ipc_match_consumer(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
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struct ivpu_ipc_hdr *ipc_hdr, struct vpu_jsm_msg *jsm_msg)
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{
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if (cons->channel != ipc_hdr->channel)
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return false;
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if (!jsm_msg || jsm_msg->request_id == cons->request_id)
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return true;
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return false;
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}
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void ivpu_ipc_irq_handler(struct ivpu_device *vdev, bool *wake_thread)
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{
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struct ivpu_ipc_info *ipc = vdev->ipc;
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struct ivpu_ipc_consumer *cons;
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struct ivpu_ipc_hdr *ipc_hdr;
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struct vpu_jsm_msg *jsm_msg;
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unsigned long flags;
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bool dispatched;
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u32 vpu_addr;
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/*
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* Driver needs to purge all messages from IPC FIFO to clear IPC interrupt.
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* Without purge IPC FIFO to 0 next IPC interrupts won't be generated.
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*/
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while (ivpu_hw_reg_ipc_rx_count_get(vdev)) {
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vpu_addr = ivpu_hw_reg_ipc_rx_addr_get(vdev);
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if (vpu_addr == REG_IO_ERROR) {
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ivpu_err_ratelimited(vdev, "Failed to read IPC rx addr register\n");
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return;
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}
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ipc_hdr = ivpu_to_cpu_addr(ipc->mem_rx, vpu_addr);
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if (!ipc_hdr) {
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ivpu_warn_ratelimited(vdev, "IPC msg 0x%x out of range\n", vpu_addr);
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continue;
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}
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ivpu_ipc_msg_dump(vdev, "RX", ipc_hdr, vpu_addr);
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jsm_msg = NULL;
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if (ipc_hdr->channel != IVPU_IPC_CHAN_BOOT_MSG) {
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jsm_msg = ivpu_to_cpu_addr(ipc->mem_rx, ipc_hdr->data_addr);
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if (!jsm_msg) {
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ivpu_warn_ratelimited(vdev, "JSM msg 0x%x out of range\n",
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ipc_hdr->data_addr);
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ivpu_ipc_rx_mark_free(vdev, ipc_hdr, NULL);
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continue;
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}
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ivpu_jsm_msg_dump(vdev, "RX", jsm_msg, ipc_hdr->data_addr);
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}
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if (atomic_read(&ipc->rx_msg_count) > IPC_MAX_RX_MSG) {
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ivpu_warn_ratelimited(vdev, "IPC RX msg dropped, msg count %d\n",
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IPC_MAX_RX_MSG);
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ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
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continue;
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}
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dispatched = false;
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spin_lock_irqsave(&ipc->cons_lock, flags);
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list_for_each_entry(cons, &ipc->cons_list, link) {
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if (ivpu_ipc_match_consumer(vdev, cons, ipc_hdr, jsm_msg)) {
|
|
ivpu_ipc_rx_msg_add(vdev, cons, ipc_hdr, jsm_msg);
|
|
dispatched = true;
|
|
break;
|
|
}
|
|
}
|
|
spin_unlock_irqrestore(&ipc->cons_lock, flags);
|
|
|
|
if (!dispatched) {
|
|
ivpu_dbg(vdev, IPC, "IPC RX msg 0x%x dropped (no consumer)\n", vpu_addr);
|
|
ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
|
|
}
|
|
}
|
|
|
|
if (wake_thread)
|
|
*wake_thread = !list_empty(&ipc->cb_msg_list);
|
|
}
|
|
|
|
irqreturn_t ivpu_ipc_irq_thread_handler(struct ivpu_device *vdev)
|
|
{
|
|
struct ivpu_ipc_info *ipc = vdev->ipc;
|
|
struct ivpu_ipc_rx_msg *rx_msg, *r;
|
|
struct list_head cb_msg_list;
|
|
|
|
INIT_LIST_HEAD(&cb_msg_list);
|
|
|
|
spin_lock_irq(&ipc->cons_lock);
|
|
list_splice_tail_init(&ipc->cb_msg_list, &cb_msg_list);
|
|
spin_unlock_irq(&ipc->cons_lock);
|
|
|
|
list_for_each_entry_safe(rx_msg, r, &cb_msg_list, link) {
|
|
rx_msg->callback(vdev, rx_msg->ipc_hdr, rx_msg->jsm_msg);
|
|
ivpu_ipc_rx_msg_del(vdev, rx_msg);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
int ivpu_ipc_init(struct ivpu_device *vdev)
|
|
{
|
|
struct ivpu_ipc_info *ipc = vdev->ipc;
|
|
int ret;
|
|
|
|
ipc->mem_tx = ivpu_bo_alloc_internal(vdev, 0, SZ_16K, DRM_IVPU_BO_WC);
|
|
if (!ipc->mem_tx) {
|
|
ivpu_err(vdev, "Failed to allocate mem_tx\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
ipc->mem_rx = ivpu_bo_alloc_internal(vdev, 0, SZ_16K, DRM_IVPU_BO_WC);
|
|
if (!ipc->mem_rx) {
|
|
ivpu_err(vdev, "Failed to allocate mem_rx\n");
|
|
ret = -ENOMEM;
|
|
goto err_free_tx;
|
|
}
|
|
|
|
ipc->mm_tx = devm_gen_pool_create(vdev->drm.dev, __ffs(IVPU_IPC_ALIGNMENT),
|
|
-1, "TX_IPC_JSM");
|
|
if (IS_ERR(ipc->mm_tx)) {
|
|
ret = PTR_ERR(ipc->mm_tx);
|
|
ivpu_err(vdev, "Failed to create gen pool, %pe\n", ipc->mm_tx);
|
|
goto err_free_rx;
|
|
}
|
|
|
|
ret = gen_pool_add(ipc->mm_tx, ipc->mem_tx->vpu_addr, ivpu_bo_size(ipc->mem_tx), -1);
|
|
if (ret) {
|
|
ivpu_err(vdev, "gen_pool_add failed, ret %d\n", ret);
|
|
goto err_free_rx;
|
|
}
|
|
|
|
spin_lock_init(&ipc->cons_lock);
|
|
INIT_LIST_HEAD(&ipc->cons_list);
|
|
INIT_LIST_HEAD(&ipc->cb_msg_list);
|
|
drmm_mutex_init(&vdev->drm, &ipc->lock);
|
|
ivpu_ipc_reset(vdev);
|
|
return 0;
|
|
|
|
err_free_rx:
|
|
ivpu_bo_free_internal(ipc->mem_rx);
|
|
err_free_tx:
|
|
ivpu_bo_free_internal(ipc->mem_tx);
|
|
return ret;
|
|
}
|
|
|
|
void ivpu_ipc_fini(struct ivpu_device *vdev)
|
|
{
|
|
struct ivpu_ipc_info *ipc = vdev->ipc;
|
|
|
|
drm_WARN_ON(&vdev->drm, ipc->on);
|
|
drm_WARN_ON(&vdev->drm, !list_empty(&ipc->cons_list));
|
|
drm_WARN_ON(&vdev->drm, !list_empty(&ipc->cb_msg_list));
|
|
drm_WARN_ON(&vdev->drm, atomic_read(&ipc->rx_msg_count) > 0);
|
|
|
|
ivpu_ipc_mem_fini(vdev);
|
|
}
|
|
|
|
void ivpu_ipc_enable(struct ivpu_device *vdev)
|
|
{
|
|
struct ivpu_ipc_info *ipc = vdev->ipc;
|
|
|
|
mutex_lock(&ipc->lock);
|
|
ipc->on = true;
|
|
mutex_unlock(&ipc->lock);
|
|
}
|
|
|
|
void ivpu_ipc_disable(struct ivpu_device *vdev)
|
|
{
|
|
struct ivpu_ipc_info *ipc = vdev->ipc;
|
|
struct ivpu_ipc_consumer *cons, *c;
|
|
struct ivpu_ipc_rx_msg *rx_msg, *r;
|
|
|
|
drm_WARN_ON(&vdev->drm, !list_empty(&ipc->cb_msg_list));
|
|
|
|
mutex_lock(&ipc->lock);
|
|
ipc->on = false;
|
|
mutex_unlock(&ipc->lock);
|
|
|
|
spin_lock_irq(&ipc->cons_lock);
|
|
list_for_each_entry_safe(cons, c, &ipc->cons_list, link) {
|
|
spin_lock(&cons->rx_lock);
|
|
if (!cons->rx_callback)
|
|
cons->aborted = true;
|
|
list_for_each_entry_safe(rx_msg, r, &cons->rx_msg_list, link)
|
|
ivpu_ipc_rx_msg_del(vdev, rx_msg);
|
|
spin_unlock(&cons->rx_lock);
|
|
wake_up(&cons->rx_msg_wq);
|
|
}
|
|
spin_unlock_irq(&ipc->cons_lock);
|
|
|
|
drm_WARN_ON(&vdev->drm, atomic_read(&ipc->rx_msg_count) > 0);
|
|
}
|
|
|
|
void ivpu_ipc_reset(struct ivpu_device *vdev)
|
|
{
|
|
struct ivpu_ipc_info *ipc = vdev->ipc;
|
|
|
|
mutex_lock(&ipc->lock);
|
|
drm_WARN_ON(&vdev->drm, ipc->on);
|
|
|
|
memset(ivpu_bo_vaddr(ipc->mem_tx), 0, ivpu_bo_size(ipc->mem_tx));
|
|
memset(ivpu_bo_vaddr(ipc->mem_rx), 0, ivpu_bo_size(ipc->mem_rx));
|
|
wmb(); /* Flush WC buffers for TX and RX rings */
|
|
|
|
mutex_unlock(&ipc->lock);
|
|
}
|