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e5ab9eff46
atomic_add_negative() does not provide the relaxed/acquire/release variants. Provide them in preparation for a new scalable reference count algorithm. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20230323102800.101763813@linutronix.de
41 lines
1.1 KiB
Text
41 lines
1.1 KiB
Text
# name meta args...
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#
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# Where meta contains a string of variants to generate.
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# Upper-case implies _{acquire,release,relaxed} variants.
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# Valid meta values are:
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# * B/b - bool: returns bool
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# * v - void: returns void
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# * I/i - int: returns base type
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# * R - return: returns base type (has _return variants)
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# * F/f - fetch: returns base type (has fetch_ variants)
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# * l - load: returns base type (has _acquire order variant)
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# * s - store: returns void (has _release order variant)
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#
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# Where args contains list of type[:name], where type is:
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# * cv - const pointer to atomic base type (atomic_t/atomic64_t/atomic_long_t)
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# * v - pointer to atomic base type (atomic_t/atomic64_t/atomic_long_t)
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# * i - base type (int/s64/long)
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# * p - pointer to base type (int/s64/long)
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#
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read l cv
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set s v i
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add vRF i v
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sub vRF i v
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inc vRF v
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dec vRF v
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and vF i v
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andnot vF i v
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or vF i v
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xor vF i v
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xchg I v i
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cmpxchg I v i:old i:new
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try_cmpxchg B v p:old i:new
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sub_and_test b i v
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dec_and_test b v
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inc_and_test b v
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add_negative B i v
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add_unless fb v i:a i:u
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inc_not_zero b v
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inc_unless_negative b v
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dec_unless_positive b v
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dec_if_positive i v
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