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2aba76f014
The current PLL configuration code for the tlc320aic26 codec appears to assume a hardcoded system clock of 12 MHz. Use the clock value provided by the DAI_OPS API for the calculation. Tested using a MityDSP-L138 platform providing a 24.576 MHz clock. Signed-off-by: Michael Williamson <michael.williamson@criticallink.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@ti.com>
464 lines
13 KiB
C
464 lines
13 KiB
C
/*
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* Texas Instruments TLV320AIC26 low power audio CODEC
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* ALSA SoC CODEC driver
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*
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* Copyright (C) 2008 Secret Lab Technologies Ltd.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/device.h>
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#include <linux/sysfs.h>
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#include <linux/spi/spi.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include "tlv320aic26.h"
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MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
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MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
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MODULE_LICENSE("GPL");
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/* AIC26 driver private data */
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struct aic26 {
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struct spi_device *spi;
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struct snd_soc_codec codec;
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int master;
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int datfm;
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int mclk;
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/* Keyclick parameters */
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int keyclick_amplitude;
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int keyclick_freq;
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int keyclick_len;
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};
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/* ---------------------------------------------------------------------
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* Register access routines
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*/
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static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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u16 *cache = codec->reg_cache;
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u16 cmd, value;
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u8 buffer[2];
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int rc;
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if (reg >= AIC26_NUM_REGS) {
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WARN_ON_ONCE(1);
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return 0;
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}
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/* Do SPI transfer; first 16bits are command; remaining is
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* register contents */
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cmd = AIC26_READ_COMMAND_WORD(reg);
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buffer[0] = (cmd >> 8) & 0xff;
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buffer[1] = cmd & 0xff;
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rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
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if (rc) {
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dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
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return -EIO;
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}
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value = (buffer[0] << 8) | buffer[1];
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/* Update the cache before returning with the value */
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cache[reg] = value;
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return value;
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}
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static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u16 *cache = codec->reg_cache;
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if (reg >= AIC26_NUM_REGS) {
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WARN_ON_ONCE(1);
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return 0;
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}
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return cache[reg];
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}
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static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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u16 *cache = codec->reg_cache;
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u16 cmd;
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u8 buffer[4];
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int rc;
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if (reg >= AIC26_NUM_REGS) {
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WARN_ON_ONCE(1);
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return -EINVAL;
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}
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/* Do SPI transfer; first 16bits are command; remaining is data
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* to write into register */
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cmd = AIC26_WRITE_COMMAND_WORD(reg);
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buffer[0] = (cmd >> 8) & 0xff;
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buffer[1] = cmd & 0xff;
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buffer[2] = value >> 8;
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buffer[3] = value;
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rc = spi_write(aic26->spi, buffer, 4);
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if (rc) {
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dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
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return -EIO;
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}
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/* update cache before returning */
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cache[reg] = value;
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return 0;
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}
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/* ---------------------------------------------------------------------
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* Digital Audio Interface Operations
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*/
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static int aic26_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_codec *codec = rtd->codec;
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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int fsref, divisor, wlen, pval, jval, dval, qval;
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u16 reg;
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dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
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substream, params);
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dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
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params_format(params));
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switch (params_rate(params)) {
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case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
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case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
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case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
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case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
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case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
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case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
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case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
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case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
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case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
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default:
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dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
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}
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/* select data word length */
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
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case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
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case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
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case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
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default:
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dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
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}
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/**
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* Configure PLL
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* fsref = (mclk * PLLM) / 2048
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* where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
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*/
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pval = 1;
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/* compute J portion of multiplier */
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jval = fsref / (aic26->mclk / 2048);
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/* compute fractional DDDD component of multiplier */
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dval = fsref - (jval * (aic26->mclk / 2048));
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dval = (10000 * dval) / (aic26->mclk / 2048);
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dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
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qval = 0;
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reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
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aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
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reg = dval << 2;
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aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
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/* Audio Control 3 (master mode, fsref rate) */
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reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
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reg &= ~0xf800;
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if (aic26->master)
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reg |= 0x0800;
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if (fsref == 48000)
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reg |= 0x2000;
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aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
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/* Audio Control 1 (FSref divisor) */
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reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
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reg &= ~0x0fff;
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reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
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aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
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return 0;
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}
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/**
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* aic26_mute - Mute control to reduce noise when changing audio format
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*/
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static int aic26_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
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dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
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dai, mute);
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if (mute)
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reg |= 0x8080;
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else
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reg &= ~0x8080;
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aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
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return 0;
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}
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static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
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" freq=%i, dir=%i)\n",
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codec_dai, clk_id, freq, dir);
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/* MCLK needs to fall between 2MHz and 50 MHz */
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if ((freq < 2000000) || (freq > 50000000))
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return -EINVAL;
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aic26->mclk = freq;
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return 0;
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}
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static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
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codec_dai, fmt);
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/* set master/slave audio interface */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
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case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
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default:
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dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
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}
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/* interface format */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
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case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
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case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
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case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
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default:
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dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
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}
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return 0;
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}
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/* ---------------------------------------------------------------------
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* Digital Audio Interface Definition
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*/
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#define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
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SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
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SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
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SNDRV_PCM_RATE_48000)
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#define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\
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SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
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static struct snd_soc_dai_ops aic26_dai_ops = {
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.hw_params = aic26_hw_params,
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.digital_mute = aic26_mute,
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.set_sysclk = aic26_set_sysclk,
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.set_fmt = aic26_set_fmt,
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};
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static struct snd_soc_dai_driver aic26_dai = {
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.name = "tlv320aic26-hifi",
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.playback = {
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.stream_name = "Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = AIC26_RATES,
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.formats = AIC26_FORMATS,
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},
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.capture = {
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.stream_name = "Capture",
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.channels_min = 2,
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.channels_max = 2,
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.rates = AIC26_RATES,
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.formats = AIC26_FORMATS,
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},
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.ops = &aic26_dai_ops,
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};
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/* ---------------------------------------------------------------------
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* ALSA controls
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*/
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static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
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static const struct soc_enum aic26_capture_src_enum =
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SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
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static const struct snd_kcontrol_new aic26_snd_controls[] = {
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/* Output */
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SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
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SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
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SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
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SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
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SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
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SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
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SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
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SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
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SOC_ENUM("Capture Source", aic26_capture_src_enum),
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};
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/* ---------------------------------------------------------------------
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* SPI device portion of driver: sysfs files for debugging
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*/
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static ssize_t aic26_keyclick_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct aic26 *aic26 = dev_get_drvdata(dev);
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int val, amp, freq, len;
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val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
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amp = (val >> 12) & 0x7;
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freq = (125 << ((val >> 8) & 0x7)) >> 1;
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len = 2 * (1 + ((val >> 4) & 0xf));
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return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
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}
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/* Any write to the keyclick attribute will trigger the keyclick event */
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static ssize_t aic26_keyclick_set(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct aic26 *aic26 = dev_get_drvdata(dev);
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int val;
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val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
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val |= 0x8000;
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aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
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return count;
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}
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static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
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/* ---------------------------------------------------------------------
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* SoC CODEC portion of driver: probe and release routines
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*/
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static int aic26_probe(struct snd_soc_codec *codec)
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{
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int ret, err, i, reg;
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dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
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/* Reset the codec to power on defaults */
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aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
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/* Power up CODEC */
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aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
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/* Audio Control 3 (master mode, fsref rate) */
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reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
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reg &= ~0xf800;
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reg |= 0x0800; /* set master mode */
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aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
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/* Fill register cache */
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for (i = 0; i < codec->driver->reg_cache_size; i++)
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aic26_reg_read(codec, i);
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/* Register the sysfs files for debugging */
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/* Create SysFS files */
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ret = device_create_file(codec->dev, &dev_attr_keyclick);
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if (ret)
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dev_info(codec->dev, "error creating sysfs files\n");
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/* register controls */
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dev_dbg(codec->dev, "Registering controls\n");
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err = snd_soc_add_controls(codec, aic26_snd_controls,
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ARRAY_SIZE(aic26_snd_controls));
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WARN_ON(err < 0);
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return 0;
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}
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static struct snd_soc_codec_driver aic26_soc_codec_dev = {
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.probe = aic26_probe,
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.read = aic26_reg_read,
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.write = aic26_reg_write,
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.reg_cache_size = AIC26_NUM_REGS,
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.reg_word_size = sizeof(u16),
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};
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/* ---------------------------------------------------------------------
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* SPI device portion of driver: probe and release routines and SPI
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* driver registration.
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*/
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static int aic26_spi_probe(struct spi_device *spi)
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{
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struct aic26 *aic26;
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int ret;
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dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
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/* Allocate driver data */
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aic26 = kzalloc(sizeof *aic26, GFP_KERNEL);
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if (!aic26)
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return -ENOMEM;
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/* Initialize the driver data */
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aic26->spi = spi;
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dev_set_drvdata(&spi->dev, aic26);
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aic26->master = 1;
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ret = snd_soc_register_codec(&spi->dev,
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&aic26_soc_codec_dev, &aic26_dai, 1);
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if (ret < 0)
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kfree(aic26);
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return ret;
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dev_dbg(&spi->dev, "SPI device initialized\n");
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return 0;
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}
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static int aic26_spi_remove(struct spi_device *spi)
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{
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snd_soc_unregister_codec(&spi->dev);
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kfree(spi_get_drvdata(spi));
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return 0;
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}
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static struct spi_driver aic26_spi = {
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.driver = {
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.name = "tlv320aic26-codec",
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.owner = THIS_MODULE,
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},
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.probe = aic26_spi_probe,
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.remove = aic26_spi_remove,
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};
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static int __init aic26_init(void)
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{
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return spi_register_driver(&aic26_spi);
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}
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module_init(aic26_init);
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|
|
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static void __exit aic26_exit(void)
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|
{
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spi_unregister_driver(&aic26_spi);
|
|
}
|
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module_exit(aic26_exit);
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