linux-stable/arch/arm/mach-sti
Patrice Chotard 0f77ce26eb Revert "ARM: sti: Implement dummy L2 cache's write_sec"
This reverts commit 7b8e0188fa.

Initially, STiH410-B2260 was supposed to be secured, that's why
l2c_write_sec was stubbed to avoid secure register access from
non secure world.

But by default, STiH410-B2260 is running in non secure mode,
so L2 cache register accesses are authorized, l2c_write_sec stub
is not needed.

With this patch, L2 cache is configured and performance are enhanced.

Link: https://lore.kernel.org/r/20200618172456.29475-1-patrice.chotard@st.com
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:46:54 +02:00
..
board-dt.c Revert "ARM: sti: Implement dummy L2 cache's write_sec" 2020-06-28 14:46:54 +02:00
Kconfig
Makefile
platsmp.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
smp.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00