Bing Guo 5b14c1f16e drm/amd/display: Fix Dynamic bpp issue with 8K30 with Navi 1X ... [ Upstream commit 06050a0f01 ] Why: In DCN2x, HW doesn't automatically divide MASTER_UPDATE_LOCK_DB_X by the number of pipes ODM Combined. How: Set MASTER_UPDATE_LOCK_DB_X to the value that is adjusted by the number of pipes ODM Combined. Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Bing Guo <bing.guo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-08-26 08:36:15 -04:00
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drm	drm/amd/display: Fix Dynamic bpp issue with 8K30 with Navi 1X	2021-08-26 08:36:15 -04:00
host1x	gpu: host1x: debug: Fix multiple channels emitting messages simultaneously	2020-08-19 08:16:04 +02:00
ipu-v3	gpu: ipu-v3: image-convert: Wait for all EOFs before completing a tile	2020-08-21 13:05:32 +02:00
vga
Makefile