Rafał Miłecki 675216a820 phy: phy-brcm-usb: fixup BCM4908 support ... [ Upstream commit 32942d33d6 ] Just like every other family BCM4908 should get its own enum value. That is required to properly handle it in chipset conditional code. The real change is excluding BCM4908 from the PLL reprogramming code (see brcmusb_usb3_pll_54mhz()). I'm not sure what's the BCM4908 reference clock frequency but: 1. BCM4908 custom driver from Broadcom's SDK doesn't reprogram PLL 2. Doing that in Linux driver stopped PHY handling some USB 3.0 devices This change makes USB 3.0 PHY recognize e.g.: 1. 04e8:6860 - Samsung Electronics Co., Ltd Galaxy series, misc. (MTP mode) 2. 1058:259f - Western Digital My Passport 259F Broadcom's STB SoCs come with a set of SUN_TOP_CTRL_* registers that allow reading chip family and product ids. Such a block & register is missing on BCM4908 so this commit introduces "compatible" string specific binding. Fixes: 4b402fa8e0 ("phy: phy-brcm-usb: support PHY on the BCM4908") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220218172459.10431-1-zajec5@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-04-08 14:23:46 +02:00
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Kconfig
Makefile
phy-bcm-cygnus-pcie.c
phy-bcm-kona-usb2.c
phy-bcm-ns-usb2.c
phy-bcm-ns-usb3.c
phy-bcm-ns2-pcie.c
phy-bcm-ns2-usbdrd.c
phy-bcm-sr-pcie.c
phy-bcm-sr-usb.c
phy-bcm63xx-usbh.c
phy-brcm-sata.c
phy-brcm-usb-init-synopsys.c
phy-brcm-usb-init.c	phy: phy-brcm-usb: fixup BCM4908 support	2022-04-08 14:23:46 +02:00
phy-brcm-usb-init.h	phy: phy-brcm-usb: fixup BCM4908 support	2022-04-08 14:23:46 +02:00
phy-brcm-usb.c	phy: phy-brcm-usb: fixup BCM4908 support	2022-04-08 14:23:46 +02:00