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2f7e8faef5
Marvell MMP2 (aka ARMADA610) is a SoC based on PJ4 core. It's ARMv6 compatible. Support basic interrupt handler and timer, and basic support for MMP2 based FLINT platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
39 lines
1,003 B
C
39 lines
1,003 B
C
#ifndef __ASM_MACH_CPUTYPE_H
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#define __ASM_MACH_CPUTYPE_H
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#include <asm/cputype.h>
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/*
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* CPU Stepping OLD_ID CPU_ID CHIP_ID
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*
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* PXA168 A0 0x41159263 0x56158400 0x00A0A333
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* PXA910 Y0 0x41159262 0x56158000 0x00F0C910
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* MMP2 Z0 0x560f5811
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*/
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#ifdef CONFIG_CPU_PXA168
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# define __cpu_is_pxa168(id) \
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({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x84; })
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#else
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# define __cpu_is_pxa168(id) (0)
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#endif
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#ifdef CONFIG_CPU_PXA910
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# define __cpu_is_pxa910(id) \
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({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x80; })
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#else
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# define __cpu_is_pxa910(id) (0)
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#endif
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#ifdef CONFIG_CPU_MMP2
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# define __cpu_is_mmp2(id) \
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({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x58; })
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#else
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# define __cpu_is_mmp2(id) (0)
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#endif
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#define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); })
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#define cpu_is_pxa910() ({ __cpu_is_pxa910(read_cpuid_id()); })
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#define cpu_is_mmp2() ({ __cpu_is_mmp2(read_cpuid_id()); })
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#endif /* __ASM_MACH_CPUTYPE_H */
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