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7ed609b002
Switch sama5d3 boards to the new PMC clock bindings. This prevents the wb50n to use the out of spec rate for USART1. Link: https://lore.kernel.org/r/20200110222744.1261464-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
62 lines
1.5 KiB
Text
62 lines
1.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with
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* UART support
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*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*/
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/at91.h>
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/ {
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aliases {
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serial5 = &uart0;
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serial6 = &uart1;
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};
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ahb {
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apb {
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pinctrl@fffff200 {
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
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AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
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AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
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};
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};
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};
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uart0: serial@f0024000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf0024000 0x100>;
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
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clock-names = "usart";
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status = "disabled";
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};
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uart1: serial@f8028000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8028000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
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clock-names = "usart";
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status = "disabled";
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};
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};
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};
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};
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