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![Will Deacon](/assets/img/avatar_default.png)
mmiowb() is now implied by spin_unlock() on architectures that require it, so there is no reason to call it from driver code. This patch was generated using coccinelle: @mmiowb@ @@ - mmiowb(); and invoked as: $ for d in drivers include/linux/qed sound; do \ spatch --include-headers --sp-file mmiowb.cocci --dir $d --in-place; done NOTE: mmiowb() has only ever guaranteed ordering in conjunction with spin_unlock(). However, pairing each mmiowb() removal in this patch with the corresponding call to spin_unlock() is not at all trivial, so there is a small chance that this change may regress any drivers incorrectly relying on mmiowb() to order MMIO writes between CPUs using lock-free synchronisation. If you've ended up bisecting to this commit, you can reintroduce the mmiowb() calls using wmb() instead, which should restore the old behaviour on all architectures other than some esoteric ia64 systems. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
158 lines
3.9 KiB
C
158 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef B43legacy_PIO_H_
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#define B43legacy_PIO_H_
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#include "b43legacy.h"
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/skbuff.h>
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#define B43legacy_PIO_TXCTL 0x00
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#define B43legacy_PIO_TXDATA 0x02
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#define B43legacy_PIO_TXQBUFSIZE 0x04
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#define B43legacy_PIO_RXCTL 0x08
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#define B43legacy_PIO_RXDATA 0x0A
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#define B43legacy_PIO_TXCTL_WRITELO (1 << 0)
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#define B43legacy_PIO_TXCTL_WRITEHI (1 << 1)
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#define B43legacy_PIO_TXCTL_COMPLETE (1 << 2)
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#define B43legacy_PIO_TXCTL_INIT (1 << 3)
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#define B43legacy_PIO_TXCTL_SUSPEND (1 << 7)
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#define B43legacy_PIO_RXCTL_DATAAVAILABLE (1 << 0)
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#define B43legacy_PIO_RXCTL_READY (1 << 1)
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/* PIO constants */
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#define B43legacy_PIO_MAXTXDEVQPACKETS 31
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#define B43legacy_PIO_TXQADJUST 80
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/* PIO tuning knobs */
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#define B43legacy_PIO_MAXTXPACKETS 256
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#ifdef CONFIG_B43LEGACY_PIO
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struct b43legacy_pioqueue;
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struct b43legacy_xmitstatus;
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struct b43legacy_pio_txpacket {
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struct b43legacy_pioqueue *queue;
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struct sk_buff *skb;
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struct list_head list;
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};
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#define pio_txpacket_getindex(packet) ((int)((packet) - \
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(packet)->queue->tx_packets_cache))
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struct b43legacy_pioqueue {
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struct b43legacy_wldev *dev;
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u16 mmio_base;
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bool tx_suspended;
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bool tx_frozen;
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bool need_workarounds; /* Workarounds needed for core.rev < 3 */
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/* Adjusted size of the device internal TX buffer. */
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u16 tx_devq_size;
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/* Used octets of the device internal TX buffer. */
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u16 tx_devq_used;
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/* Used packet slots in the device internal TX buffer. */
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u8 tx_devq_packets;
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/* Packets from the txfree list can
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* be taken on incoming TX requests.
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*/
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struct list_head txfree;
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unsigned int nr_txfree;
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/* Packets on the txqueue are queued,
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* but not completely written to the chip, yet.
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*/
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struct list_head txqueue;
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/* Packets on the txrunning queue are completely
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* posted to the device. We are waiting for the txstatus.
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*/
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struct list_head txrunning;
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struct tasklet_struct txtask;
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struct b43legacy_pio_txpacket
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tx_packets_cache[B43legacy_PIO_MAXTXPACKETS];
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};
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static inline
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u16 b43legacy_pio_read(struct b43legacy_pioqueue *queue,
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u16 offset)
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{
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return b43legacy_read16(queue->dev, queue->mmio_base + offset);
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}
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static inline
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void b43legacy_pio_write(struct b43legacy_pioqueue *queue,
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u16 offset, u16 value)
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{
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b43legacy_write16(queue->dev, queue->mmio_base + offset, value);
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}
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int b43legacy_pio_init(struct b43legacy_wldev *dev);
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void b43legacy_pio_free(struct b43legacy_wldev *dev);
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int b43legacy_pio_tx(struct b43legacy_wldev *dev,
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struct sk_buff *skb);
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void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev,
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const struct b43legacy_txstatus *status);
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void b43legacy_pio_rx(struct b43legacy_pioqueue *queue);
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/* Suspend TX queue in hardware. */
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void b43legacy_pio_tx_suspend(struct b43legacy_pioqueue *queue);
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void b43legacy_pio_tx_resume(struct b43legacy_pioqueue *queue);
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/* Suspend (freeze) the TX tasklet (software level). */
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void b43legacy_pio_freeze_txqueues(struct b43legacy_wldev *dev);
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void b43legacy_pio_thaw_txqueues(struct b43legacy_wldev *dev);
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#else /* CONFIG_B43LEGACY_PIO */
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static inline
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int b43legacy_pio_init(struct b43legacy_wldev *dev)
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{
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return 0;
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}
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static inline
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void b43legacy_pio_free(struct b43legacy_wldev *dev)
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{
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}
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static inline
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int b43legacy_pio_tx(struct b43legacy_wldev *dev,
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struct sk_buff *skb)
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{
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return 0;
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}
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static inline
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void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev,
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const struct b43legacy_txstatus *status)
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{
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}
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static inline
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void b43legacy_pio_rx(struct b43legacy_pioqueue *queue)
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{
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}
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static inline
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void b43legacy_pio_tx_suspend(struct b43legacy_pioqueue *queue)
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{
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}
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static inline
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void b43legacy_pio_tx_resume(struct b43legacy_pioqueue *queue)
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{
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}
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static inline
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void b43legacy_pio_freeze_txqueues(struct b43legacy_wldev *dev)
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{
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}
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static inline
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void b43legacy_pio_thaw_txqueues(struct b43legacy_wldev *dev)
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{
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}
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#endif /* CONFIG_B43LEGACY_PIO */
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#endif /* B43legacy_PIO_H_ */
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