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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details [based] [from] [clk] [highbank] [c] you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 355 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
482 lines
12 KiB
C
482 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/* ZD1211 USB-WLAN driver for Linux
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*
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* Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
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* Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
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*/
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#include <linux/kernel.h>
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#include "zd_rf.h"
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#include "zd_usb.h"
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#include "zd_chip.h"
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static const u32 chan_rv[][2] = {
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RF_CHANNEL( 1) = { 0x09ec00, 0x8cccc8 },
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RF_CHANNEL( 2) = { 0x09ec00, 0x8cccd8 },
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RF_CHANNEL( 3) = { 0x09ec00, 0x8cccc0 },
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RF_CHANNEL( 4) = { 0x09ec00, 0x8cccd0 },
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RF_CHANNEL( 5) = { 0x05ec00, 0x8cccc8 },
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RF_CHANNEL( 6) = { 0x05ec00, 0x8cccd8 },
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RF_CHANNEL( 7) = { 0x05ec00, 0x8cccc0 },
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RF_CHANNEL( 8) = { 0x05ec00, 0x8cccd0 },
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RF_CHANNEL( 9) = { 0x0dec00, 0x8cccc8 },
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RF_CHANNEL(10) = { 0x0dec00, 0x8cccd8 },
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RF_CHANNEL(11) = { 0x0dec00, 0x8cccc0 },
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RF_CHANNEL(12) = { 0x0dec00, 0x8cccd0 },
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RF_CHANNEL(13) = { 0x03ec00, 0x8cccc8 },
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RF_CHANNEL(14) = { 0x03ec00, 0x866660 },
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};
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static const u32 std_rv[] = {
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0x4ff821,
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0xc5fbfc,
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0x21ebfe,
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0xafd401, /* freq shift 0xaad401 */
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0x6cf56a,
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0xe04073,
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0x193d76,
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0x9dd844,
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0x500007,
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0xd8c010,
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};
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static const u32 rv_init1[] = {
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0x3c9000,
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0xbfffff,
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0x700000,
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0xf15d58,
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};
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static const u32 rv_init2[] = {
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0xf15d59,
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0xf15d5c,
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0xf15d58,
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};
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static const struct zd_ioreq16 ioreqs_sw[] = {
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{ ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
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{ ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
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};
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static int zd1211b_al7230b_finalize(struct zd_chip *chip)
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{
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int r;
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static const struct zd_ioreq16 ioreqs[] = {
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{ ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
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{ ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
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{ ZD_CR203, 0x04 },
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{ },
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{ ZD_CR240, 0x80 },
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};
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r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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if (r)
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return r;
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if (chip->new_phy_layout) {
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/* antenna selection? */
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r = zd_iowrite16_locked(chip, 0xe5, ZD_CR9);
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if (r)
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return r;
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}
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return zd_iowrite16_locked(chip, 0x04, ZD_CR203);
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}
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static int zd1211_al7230b_init_hw(struct zd_rf *rf)
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{
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int r;
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struct zd_chip *chip = zd_rf_to_chip(rf);
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/* All of these writes are identical to AL2230 unless otherwise
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* specified */
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static const struct zd_ioreq16 ioreqs_1[] = {
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/* This one is 7230-specific, and happens before the rest */
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{ ZD_CR240, 0x57 },
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{ },
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{ ZD_CR15, 0x20 }, { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 },
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{ ZD_CR26, 0x11 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
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{ ZD_CR44, 0x33 },
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/* This value is different for 7230 (was: 0x2a) */
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{ ZD_CR106, 0x22 },
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{ ZD_CR107, 0x1a }, { ZD_CR109, 0x09 }, { ZD_CR110, 0x27 },
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{ ZD_CR111, 0x2b }, { ZD_CR112, 0x2b }, { ZD_CR119, 0x0a },
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/* This happened further down in AL2230,
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* and the value changed (was: 0xe0) */
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{ ZD_CR122, 0xfc },
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{ ZD_CR10, 0x89 },
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/* for newest (3rd cut) AL2300 */
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{ ZD_CR17, 0x28 },
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{ ZD_CR26, 0x93 }, { ZD_CR34, 0x30 },
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/* for newest (3rd cut) AL2300 */
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{ ZD_CR35, 0x3e },
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{ ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
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/* for newest (3rd cut) AL2300 */
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{ ZD_CR46, 0x96 },
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{ ZD_CR47, 0x1e }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
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{ ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
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{ ZD_CR92, 0x0a }, { ZD_CR99, 0x28 },
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/* This value is different for 7230 (was: 0x00) */
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{ ZD_CR100, 0x02 },
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{ ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
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/* This value is different for 7230 (was: 0x24) */
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{ ZD_CR106, 0x22 },
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/* This value is different for 7230 (was: 0x2a) */
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{ ZD_CR107, 0x3f },
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{ ZD_CR109, 0x09 },
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/* This value is different for 7230 (was: 0x13) */
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{ ZD_CR110, 0x1f },
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{ ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
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{ ZD_CR114, 0x27 },
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/* for newest (3rd cut) AL2300 */
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{ ZD_CR115, 0x24 },
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/* This value is different for 7230 (was: 0x24) */
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{ ZD_CR116, 0x3f },
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/* This value is different for 7230 (was: 0xf4) */
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{ ZD_CR117, 0xfa },
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{ ZD_CR118, 0xfc }, { ZD_CR119, 0x10 }, { ZD_CR120, 0x4f },
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{ ZD_CR121, 0x77 }, { ZD_CR137, 0x88 },
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/* This one is 7230-specific */
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{ ZD_CR138, 0xa8 },
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/* This value is different for 7230 (was: 0xff) */
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{ ZD_CR252, 0x34 },
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/* This value is different for 7230 (was: 0xff) */
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{ ZD_CR253, 0x34 },
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/* PLL_OFF */
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{ ZD_CR251, 0x2f },
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};
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static const struct zd_ioreq16 ioreqs_2[] = {
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{ ZD_CR251, 0x3f }, /* PLL_ON */
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{ ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
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{ ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
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};
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r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
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if (r)
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return r;
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r = zd_iowrite16_locked(chip, 0x06, ZD_CR203);
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if (r)
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return r;
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r = zd_iowrite16_locked(chip, 0x80, ZD_CR240);
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if (r)
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return r;
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return 0;
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}
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static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
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{
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int r;
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struct zd_chip *chip = zd_rf_to_chip(rf);
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static const struct zd_ioreq16 ioreqs_1[] = {
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{ ZD_CR240, 0x57 }, { ZD_CR9, 0x9 },
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{ },
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{ ZD_CR10, 0x8b }, { ZD_CR15, 0x20 },
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{ ZD_CR17, 0x2B }, /* for newest (3rd cut) AL2230 */
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{ ZD_CR20, 0x10 }, /* 4N25->Stone Request */
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{ ZD_CR23, 0x40 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
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{ ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
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{ ZD_CR33, 0x28 }, /* 5613 */
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{ ZD_CR34, 0x30 },
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{ ZD_CR35, 0x3e }, /* for newest (3rd cut) AL2230 */
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{ ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
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{ ZD_CR46, 0x99 }, /* for newest (3rd cut) AL2230 */
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{ ZD_CR47, 0x1e },
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/* ZD1215 5610 */
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{ ZD_CR48, 0x00 }, { ZD_CR49, 0x00 }, { ZD_CR51, 0x01 },
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{ ZD_CR52, 0x80 }, { ZD_CR53, 0x7e }, { ZD_CR65, 0x00 },
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{ ZD_CR66, 0x00 }, { ZD_CR67, 0x00 }, { ZD_CR68, 0x00 },
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{ ZD_CR69, 0x28 },
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{ ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
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{ ZD_CR87, 0x0A }, { ZD_CR89, 0x04 },
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{ ZD_CR90, 0x58 }, /* 5112 */
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{ ZD_CR91, 0x00 }, /* 5613 */
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{ ZD_CR92, 0x0a },
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{ ZD_CR98, 0x8d }, /* 4804, for 1212 new algorithm */
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{ ZD_CR99, 0x00 }, { ZD_CR100, 0x02 }, { ZD_CR101, 0x13 },
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{ ZD_CR102, 0x27 },
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{ ZD_CR106, 0x20 }, /* change to 0x24 for AL7230B */
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{ ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
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{ ZD_CR112, 0x1f },
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};
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static const struct zd_ioreq16 ioreqs_new_phy[] = {
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{ ZD_CR107, 0x28 },
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{ ZD_CR110, 0x1f }, /* 5127, 0x13->0x1f */
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{ ZD_CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
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{ ZD_CR116, 0x2a }, { ZD_CR118, 0xfa }, { ZD_CR119, 0x12 },
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{ ZD_CR121, 0x6c }, /* 5613 */
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};
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static const struct zd_ioreq16 ioreqs_old_phy[] = {
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{ ZD_CR107, 0x24 },
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{ ZD_CR110, 0x13 }, /* 5127, 0x13->0x1f */
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{ ZD_CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
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{ ZD_CR116, 0x24 }, { ZD_CR118, 0xfc }, { ZD_CR119, 0x11 },
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{ ZD_CR121, 0x6a }, /* 5613 */
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};
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static const struct zd_ioreq16 ioreqs_2[] = {
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{ ZD_CR113, 0x27 }, { ZD_CR114, 0x27 }, { ZD_CR115, 0x24 },
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{ ZD_CR117, 0xfa }, { ZD_CR120, 0x4f },
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{ ZD_CR122, 0xfc }, /* E0->FCh at 4901 */
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{ ZD_CR123, 0x57 }, /* 5613 */
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{ ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
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{ ZD_CR126, 0x6c }, /* 5613 */
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{ ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
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{ ZD_CR130, 0x10 },
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{ ZD_CR131, 0x00 }, /* 5112 */
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{ ZD_CR137, 0x50 }, /* 5613 */
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{ ZD_CR138, 0xa8 }, /* 5112 */
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{ ZD_CR144, 0xac }, /* 5613 */
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{ ZD_CR148, 0x40 }, /* 5112 */
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{ ZD_CR149, 0x40 }, /* 4O07, 50->40 */
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{ ZD_CR150, 0x1a }, /* 5112, 0C->1A */
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{ ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
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{ ZD_CR251, 0x2f }, /* PLL_OFF */
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};
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static const struct zd_ioreq16 ioreqs_3[] = {
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{ ZD_CR251, 0x7f }, /* PLL_ON */
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{ ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
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{ ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
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};
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r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
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if (r)
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return r;
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if (chip->new_phy_layout)
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r = zd_iowrite16a_locked(chip, ioreqs_new_phy,
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ARRAY_SIZE(ioreqs_new_phy));
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else
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r = zd_iowrite16a_locked(chip, ioreqs_old_phy,
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ARRAY_SIZE(ioreqs_old_phy));
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_3, ARRAY_SIZE(ioreqs_3));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
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if (r)
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return r;
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return zd1211b_al7230b_finalize(chip);
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}
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static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
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{
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int r;
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const u32 *rv = chan_rv[channel-1];
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struct zd_chip *chip = zd_rf_to_chip(rf);
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static const struct zd_ioreq16 ioreqs[] = {
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/* PLL_ON */
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{ ZD_CR251, 0x3f },
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{ ZD_CR203, 0x06 }, { ZD_CR240, 0x08 },
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};
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r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
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if (r)
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return r;
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/* PLL_OFF */
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r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0x3c9000);
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0xf15d58);
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv, 2);
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0x3c9000);
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if (r)
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return r;
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return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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}
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static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
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{
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int r;
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const u32 *rv = chan_rv[channel-1];
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struct zd_chip *chip = zd_rf_to_chip(rf);
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r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
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if (r)
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return r;
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r = zd_iowrite16_locked(chip, 0xe4, ZD_CR9);
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if (r)
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return r;
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/* PLL_OFF */
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r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0x3c9000);
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0xf15d58);
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv, 2);
|
|
if (r)
|
|
return r;
|
|
|
|
r = zd_rfwrite_cr_locked(chip, 0x3c9000);
|
|
if (r)
|
|
return r;
|
|
|
|
r = zd_iowrite16_locked(chip, 0x7f, ZD_CR251);
|
|
if (r)
|
|
return r;
|
|
|
|
return zd1211b_al7230b_finalize(chip);
|
|
}
|
|
|
|
static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
|
|
{
|
|
struct zd_chip *chip = zd_rf_to_chip(rf);
|
|
static const struct zd_ioreq16 ioreqs[] = {
|
|
{ ZD_CR11, 0x00 },
|
|
{ ZD_CR251, 0x3f },
|
|
};
|
|
|
|
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
|
|
}
|
|
|
|
static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
|
|
{
|
|
struct zd_chip *chip = zd_rf_to_chip(rf);
|
|
static const struct zd_ioreq16 ioreqs[] = {
|
|
{ ZD_CR11, 0x00 },
|
|
{ ZD_CR251, 0x7f },
|
|
};
|
|
|
|
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
|
|
}
|
|
|
|
static int al7230b_switch_radio_off(struct zd_rf *rf)
|
|
{
|
|
struct zd_chip *chip = zd_rf_to_chip(rf);
|
|
static const struct zd_ioreq16 ioreqs[] = {
|
|
{ ZD_CR11, 0x04 },
|
|
{ ZD_CR251, 0x2f },
|
|
};
|
|
|
|
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
|
|
}
|
|
|
|
/* ZD1211B+AL7230B 6m band edge patching differs slightly from other
|
|
* configurations */
|
|
static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
|
|
{
|
|
struct zd_chip *chip = zd_rf_to_chip(rf);
|
|
struct zd_ioreq16 ioreqs[] = {
|
|
{ ZD_CR128, 0x14 }, { ZD_CR129, 0x12 },
|
|
};
|
|
|
|
/* FIXME: Channel 11 is not the edge for all regulatory domains. */
|
|
if (channel == 1) {
|
|
ioreqs[0].value = 0x0e;
|
|
ioreqs[1].value = 0x10;
|
|
} else if (channel == 11) {
|
|
ioreqs[0].value = 0x10;
|
|
ioreqs[1].value = 0x10;
|
|
}
|
|
|
|
dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel);
|
|
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
|
|
}
|
|
|
|
int zd_rf_init_al7230b(struct zd_rf *rf)
|
|
{
|
|
struct zd_chip *chip = zd_rf_to_chip(rf);
|
|
|
|
if (zd_chip_is_zd1211b(chip)) {
|
|
rf->init_hw = zd1211b_al7230b_init_hw;
|
|
rf->switch_radio_on = zd1211b_al7230b_switch_radio_on;
|
|
rf->set_channel = zd1211b_al7230b_set_channel;
|
|
rf->patch_6m_band_edge = zd1211b_al7230b_patch_6m;
|
|
} else {
|
|
rf->init_hw = zd1211_al7230b_init_hw;
|
|
rf->switch_radio_on = zd1211_al7230b_switch_radio_on;
|
|
rf->set_channel = zd1211_al7230b_set_channel;
|
|
rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
|
|
rf->patch_cck_gain = 1;
|
|
}
|
|
|
|
rf->switch_radio_off = al7230b_switch_radio_off;
|
|
|
|
return 0;
|
|
}
|