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![Ingo Molnar](/assets/img/avatar_default.png)
But first update usage sites with the new header dependency. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mike Galbraith <efault@gmx.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
1066 lines
28 KiB
C
1066 lines
28 KiB
C
/*
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* DMA Engine test module
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*
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* Copyright (C) 2007 Atmel Corporation
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* Copyright (C) 2013 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/freezer.h>
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#include <linux/init.h>
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#include <linux/kthread.h>
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#include <linux/sched/task.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/random.h>
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#include <linux/slab.h>
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#include <linux/wait.h>
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static unsigned int test_buf_size = 16384;
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module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
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static char test_channel[20];
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module_param_string(channel, test_channel, sizeof(test_channel),
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S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
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static char test_device[32];
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module_param_string(device, test_device, sizeof(test_device),
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S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
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static unsigned int threads_per_chan = 1;
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module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(threads_per_chan,
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"Number of threads to start per channel (default: 1)");
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static unsigned int max_channels;
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module_param(max_channels, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(max_channels,
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"Maximum number of channels to use (default: all)");
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static unsigned int iterations;
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module_param(iterations, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(iterations,
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"Iterations before stopping test (default: infinite)");
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static unsigned int sg_buffers = 1;
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module_param(sg_buffers, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(sg_buffers,
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"Number of scatter gather buffers (default: 1)");
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static unsigned int dmatest;
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module_param(dmatest, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(dmatest,
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"dmatest 0-memcpy 1-slave_sg (default: 0)");
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static unsigned int xor_sources = 3;
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module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(xor_sources,
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"Number of xor source buffers (default: 3)");
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static unsigned int pq_sources = 3;
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module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(pq_sources,
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"Number of p+q source buffers (default: 3)");
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static int timeout = 3000;
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module_param(timeout, uint, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
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"Pass -1 for infinite timeout");
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static bool noverify;
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module_param(noverify, bool, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(noverify, "Disable random data setup and verification");
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static bool verbose;
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module_param(verbose, bool, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
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/**
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* struct dmatest_params - test parameters.
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* @buf_size: size of the memcpy test buffer
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* @channel: bus ID of the channel to test
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* @device: bus ID of the DMA Engine to test
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* @threads_per_chan: number of threads to start per channel
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* @max_channels: maximum number of channels to use
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* @iterations: iterations before stopping test
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* @xor_sources: number of xor source buffers
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* @pq_sources: number of p+q source buffers
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* @timeout: transfer timeout in msec, -1 for infinite timeout
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*/
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struct dmatest_params {
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unsigned int buf_size;
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char channel[20];
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char device[32];
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unsigned int threads_per_chan;
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unsigned int max_channels;
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unsigned int iterations;
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unsigned int xor_sources;
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unsigned int pq_sources;
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int timeout;
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bool noverify;
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};
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/**
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* struct dmatest_info - test information.
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* @params: test parameters
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* @lock: access protection to the fields of this structure
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*/
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static struct dmatest_info {
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/* Test parameters */
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struct dmatest_params params;
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/* Internal state */
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struct list_head channels;
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unsigned int nr_channels;
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struct mutex lock;
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bool did_init;
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} test_info = {
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.channels = LIST_HEAD_INIT(test_info.channels),
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.lock = __MUTEX_INITIALIZER(test_info.lock),
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};
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static int dmatest_run_set(const char *val, const struct kernel_param *kp);
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static int dmatest_run_get(char *val, const struct kernel_param *kp);
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static const struct kernel_param_ops run_ops = {
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.set = dmatest_run_set,
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.get = dmatest_run_get,
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};
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static bool dmatest_run;
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module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(run, "Run the test (default: false)");
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/* Maximum amount of mismatched bytes in buffer to print */
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#define MAX_ERROR_COUNT 32
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/*
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* Initialization patterns. All bytes in the source buffer has bit 7
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* set, all bytes in the destination buffer has bit 7 cleared.
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*
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* Bit 6 is set for all bytes which are to be copied by the DMA
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* engine. Bit 5 is set for all bytes which are to be overwritten by
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* the DMA engine.
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*
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* The remaining bits are the inverse of a counter which increments by
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* one for each byte address.
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*/
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#define PATTERN_SRC 0x80
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#define PATTERN_DST 0x00
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#define PATTERN_COPY 0x40
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#define PATTERN_OVERWRITE 0x20
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#define PATTERN_COUNT_MASK 0x1f
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struct dmatest_thread {
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struct list_head node;
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struct dmatest_info *info;
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struct task_struct *task;
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struct dma_chan *chan;
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u8 **srcs;
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u8 **usrcs;
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u8 **dsts;
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u8 **udsts;
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enum dma_transaction_type type;
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bool done;
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};
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struct dmatest_chan {
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struct list_head node;
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struct dma_chan *chan;
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struct list_head threads;
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};
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static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
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static bool wait;
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static bool is_threaded_test_run(struct dmatest_info *info)
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{
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struct dmatest_chan *dtc;
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list_for_each_entry(dtc, &info->channels, node) {
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struct dmatest_thread *thread;
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list_for_each_entry(thread, &dtc->threads, node) {
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if (!thread->done)
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return true;
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}
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}
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return false;
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}
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static int dmatest_wait_get(char *val, const struct kernel_param *kp)
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{
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struct dmatest_info *info = &test_info;
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struct dmatest_params *params = &info->params;
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if (params->iterations)
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wait_event(thread_wait, !is_threaded_test_run(info));
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wait = true;
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return param_get_bool(val, kp);
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}
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static const struct kernel_param_ops wait_ops = {
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.get = dmatest_wait_get,
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.set = param_set_bool,
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};
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module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
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MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
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static bool dmatest_match_channel(struct dmatest_params *params,
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struct dma_chan *chan)
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{
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if (params->channel[0] == '\0')
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return true;
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return strcmp(dma_chan_name(chan), params->channel) == 0;
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}
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static bool dmatest_match_device(struct dmatest_params *params,
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struct dma_device *device)
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{
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if (params->device[0] == '\0')
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return true;
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return strcmp(dev_name(device->dev), params->device) == 0;
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}
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static unsigned long dmatest_random(void)
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{
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unsigned long buf;
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prandom_bytes(&buf, sizeof(buf));
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return buf;
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}
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static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
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unsigned int buf_size)
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{
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unsigned int i;
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u8 *buf;
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for (; (buf = *bufs); bufs++) {
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for (i = 0; i < start; i++)
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buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
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for ( ; i < start + len; i++)
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buf[i] = PATTERN_SRC | PATTERN_COPY
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| (~i & PATTERN_COUNT_MASK);
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for ( ; i < buf_size; i++)
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buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
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buf++;
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}
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}
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static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
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unsigned int buf_size)
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{
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unsigned int i;
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u8 *buf;
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for (; (buf = *bufs); bufs++) {
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for (i = 0; i < start; i++)
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buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
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for ( ; i < start + len; i++)
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buf[i] = PATTERN_DST | PATTERN_OVERWRITE
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| (~i & PATTERN_COUNT_MASK);
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for ( ; i < buf_size; i++)
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buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
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}
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}
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static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
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unsigned int counter, bool is_srcbuf)
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{
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u8 diff = actual ^ pattern;
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u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
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const char *thread_name = current->comm;
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if (is_srcbuf)
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pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
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thread_name, index, expected, actual);
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else if ((pattern & PATTERN_COPY)
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&& (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
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pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
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thread_name, index, expected, actual);
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else if (diff & PATTERN_SRC)
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pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
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thread_name, index, expected, actual);
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else
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pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
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thread_name, index, expected, actual);
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}
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static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
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unsigned int end, unsigned int counter, u8 pattern,
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bool is_srcbuf)
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{
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unsigned int i;
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unsigned int error_count = 0;
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u8 actual;
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u8 expected;
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u8 *buf;
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unsigned int counter_orig = counter;
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for (; (buf = *bufs); bufs++) {
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counter = counter_orig;
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for (i = start; i < end; i++) {
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actual = buf[i];
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expected = pattern | (~counter & PATTERN_COUNT_MASK);
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if (actual != expected) {
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if (error_count < MAX_ERROR_COUNT)
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dmatest_mismatch(actual, pattern, i,
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counter, is_srcbuf);
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error_count++;
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}
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counter++;
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}
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}
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if (error_count > MAX_ERROR_COUNT)
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pr_warn("%s: %u errors suppressed\n",
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current->comm, error_count - MAX_ERROR_COUNT);
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return error_count;
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}
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/* poor man's completion - we want to use wait_event_freezable() on it */
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struct dmatest_done {
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bool done;
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wait_queue_head_t *wait;
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};
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static void dmatest_callback(void *arg)
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{
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struct dmatest_done *done = arg;
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done->done = true;
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wake_up_all(done->wait);
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}
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static unsigned int min_odd(unsigned int x, unsigned int y)
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{
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unsigned int val = min(x, y);
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return val % 2 ? val : val - 1;
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}
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static void result(const char *err, unsigned int n, unsigned int src_off,
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unsigned int dst_off, unsigned int len, unsigned long data)
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{
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pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
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current->comm, n, err, src_off, dst_off, len, data);
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}
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static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
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unsigned int dst_off, unsigned int len,
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unsigned long data)
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{
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pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
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current->comm, n, err, src_off, dst_off, len, data);
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}
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#define verbose_result(err, n, src_off, dst_off, len, data) ({ \
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if (verbose) \
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result(err, n, src_off, dst_off, len, data); \
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else \
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dbg_result(err, n, src_off, dst_off, len, data);\
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})
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static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
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{
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unsigned long long per_sec = 1000000;
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if (runtime <= 0)
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return 0;
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/* drop precision until runtime is 32-bits */
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while (runtime > UINT_MAX) {
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runtime >>= 1;
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per_sec <<= 1;
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}
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per_sec *= val;
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do_div(per_sec, runtime);
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return per_sec;
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}
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static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
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{
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return dmatest_persec(runtime, len >> 10);
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}
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/*
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* This function repeatedly tests DMA transfers of various lengths and
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* offsets for a given operation type until it is told to exit by
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* kthread_stop(). There may be multiple threads running this function
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* in parallel for a single channel, and there may be multiple channels
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* being tested in parallel.
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*
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* Before each test, the source and destination buffer is initialized
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* with a known pattern. This pattern is different depending on
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* whether it's in an area which is supposed to be copied or
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* overwritten, and different in the source and destination buffers.
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* So if the DMA engine doesn't copy exactly what we tell it to copy,
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* we'll notice.
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*/
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static int dmatest_func(void *data)
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{
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DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
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struct dmatest_thread *thread = data;
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struct dmatest_done done = { .wait = &done_wait };
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struct dmatest_info *info;
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struct dmatest_params *params;
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struct dma_chan *chan;
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struct dma_device *dev;
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unsigned int error_count;
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unsigned int failed_tests = 0;
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unsigned int total_tests = 0;
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dma_cookie_t cookie;
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enum dma_status status;
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enum dma_ctrl_flags flags;
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u8 *pq_coefs = NULL;
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int ret;
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int src_cnt;
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int dst_cnt;
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int i;
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ktime_t ktime, start, diff;
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ktime_t filltime = 0;
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ktime_t comparetime = 0;
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s64 runtime = 0;
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unsigned long long total_len = 0;
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u8 align = 0;
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set_freezable();
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ret = -ENOMEM;
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smp_rmb();
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info = thread->info;
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params = &info->params;
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chan = thread->chan;
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dev = chan->device;
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if (thread->type == DMA_MEMCPY) {
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align = dev->copy_align;
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src_cnt = dst_cnt = 1;
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} else if (thread->type == DMA_SG) {
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align = dev->copy_align;
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src_cnt = dst_cnt = sg_buffers;
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} else if (thread->type == DMA_XOR) {
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/* force odd to ensure dst = src */
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src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
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dst_cnt = 1;
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align = dev->xor_align;
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} else if (thread->type == DMA_PQ) {
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/* force odd to ensure dst = src */
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src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
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dst_cnt = 2;
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align = dev->pq_align;
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pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL);
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if (!pq_coefs)
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goto err_thread_type;
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for (i = 0; i < src_cnt; i++)
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pq_coefs[i] = 1;
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} else
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goto err_thread_type;
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thread->srcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
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if (!thread->srcs)
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goto err_srcs;
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thread->usrcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
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if (!thread->usrcs)
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goto err_usrcs;
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for (i = 0; i < src_cnt; i++) {
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thread->usrcs[i] = kmalloc(params->buf_size + align,
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GFP_KERNEL);
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if (!thread->usrcs[i])
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goto err_srcbuf;
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|
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/* align srcs to alignment restriction */
|
|
if (align)
|
|
thread->srcs[i] = PTR_ALIGN(thread->usrcs[i], align);
|
|
else
|
|
thread->srcs[i] = thread->usrcs[i];
|
|
}
|
|
thread->srcs[i] = NULL;
|
|
|
|
thread->dsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
|
|
if (!thread->dsts)
|
|
goto err_dsts;
|
|
|
|
thread->udsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
|
|
if (!thread->udsts)
|
|
goto err_udsts;
|
|
|
|
for (i = 0; i < dst_cnt; i++) {
|
|
thread->udsts[i] = kmalloc(params->buf_size + align,
|
|
GFP_KERNEL);
|
|
if (!thread->udsts[i])
|
|
goto err_dstbuf;
|
|
|
|
/* align dsts to alignment restriction */
|
|
if (align)
|
|
thread->dsts[i] = PTR_ALIGN(thread->udsts[i], align);
|
|
else
|
|
thread->dsts[i] = thread->udsts[i];
|
|
}
|
|
thread->dsts[i] = NULL;
|
|
|
|
set_user_nice(current, 10);
|
|
|
|
/*
|
|
* src and dst buffers are freed by ourselves below
|
|
*/
|
|
flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
|
|
|
|
ktime = ktime_get();
|
|
while (!kthread_should_stop()
|
|
&& !(params->iterations && total_tests >= params->iterations)) {
|
|
struct dma_async_tx_descriptor *tx = NULL;
|
|
struct dmaengine_unmap_data *um;
|
|
dma_addr_t srcs[src_cnt];
|
|
dma_addr_t *dsts;
|
|
unsigned int src_off, dst_off, len;
|
|
struct scatterlist tx_sg[src_cnt];
|
|
struct scatterlist rx_sg[src_cnt];
|
|
|
|
total_tests++;
|
|
|
|
if (1 << align > params->buf_size) {
|
|
pr_err("%u-byte buffer too small for %d-byte alignment\n",
|
|
params->buf_size, 1 << align);
|
|
break;
|
|
}
|
|
|
|
if (params->noverify)
|
|
len = params->buf_size;
|
|
else
|
|
len = dmatest_random() % params->buf_size + 1;
|
|
|
|
len = (len >> align) << align;
|
|
if (!len)
|
|
len = 1 << align;
|
|
|
|
total_len += len;
|
|
|
|
if (params->noverify) {
|
|
src_off = 0;
|
|
dst_off = 0;
|
|
} else {
|
|
start = ktime_get();
|
|
src_off = dmatest_random() % (params->buf_size - len + 1);
|
|
dst_off = dmatest_random() % (params->buf_size - len + 1);
|
|
|
|
src_off = (src_off >> align) << align;
|
|
dst_off = (dst_off >> align) << align;
|
|
|
|
dmatest_init_srcs(thread->srcs, src_off, len,
|
|
params->buf_size);
|
|
dmatest_init_dsts(thread->dsts, dst_off, len,
|
|
params->buf_size);
|
|
|
|
diff = ktime_sub(ktime_get(), start);
|
|
filltime = ktime_add(filltime, diff);
|
|
}
|
|
|
|
um = dmaengine_get_unmap_data(dev->dev, src_cnt + dst_cnt,
|
|
GFP_KERNEL);
|
|
if (!um) {
|
|
failed_tests++;
|
|
result("unmap data NULL", total_tests,
|
|
src_off, dst_off, len, ret);
|
|
continue;
|
|
}
|
|
|
|
um->len = params->buf_size;
|
|
for (i = 0; i < src_cnt; i++) {
|
|
void *buf = thread->srcs[i];
|
|
struct page *pg = virt_to_page(buf);
|
|
unsigned pg_off = (unsigned long) buf & ~PAGE_MASK;
|
|
|
|
um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
|
|
um->len, DMA_TO_DEVICE);
|
|
srcs[i] = um->addr[i] + src_off;
|
|
ret = dma_mapping_error(dev->dev, um->addr[i]);
|
|
if (ret) {
|
|
dmaengine_unmap_put(um);
|
|
result("src mapping error", total_tests,
|
|
src_off, dst_off, len, ret);
|
|
failed_tests++;
|
|
continue;
|
|
}
|
|
um->to_cnt++;
|
|
}
|
|
/* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
|
|
dsts = &um->addr[src_cnt];
|
|
for (i = 0; i < dst_cnt; i++) {
|
|
void *buf = thread->dsts[i];
|
|
struct page *pg = virt_to_page(buf);
|
|
unsigned pg_off = (unsigned long) buf & ~PAGE_MASK;
|
|
|
|
dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
|
|
DMA_BIDIRECTIONAL);
|
|
ret = dma_mapping_error(dev->dev, dsts[i]);
|
|
if (ret) {
|
|
dmaengine_unmap_put(um);
|
|
result("dst mapping error", total_tests,
|
|
src_off, dst_off, len, ret);
|
|
failed_tests++;
|
|
continue;
|
|
}
|
|
um->bidi_cnt++;
|
|
}
|
|
|
|
sg_init_table(tx_sg, src_cnt);
|
|
sg_init_table(rx_sg, src_cnt);
|
|
for (i = 0; i < src_cnt; i++) {
|
|
sg_dma_address(&rx_sg[i]) = srcs[i];
|
|
sg_dma_address(&tx_sg[i]) = dsts[i] + dst_off;
|
|
sg_dma_len(&tx_sg[i]) = len;
|
|
sg_dma_len(&rx_sg[i]) = len;
|
|
}
|
|
|
|
if (thread->type == DMA_MEMCPY)
|
|
tx = dev->device_prep_dma_memcpy(chan,
|
|
dsts[0] + dst_off,
|
|
srcs[0], len, flags);
|
|
else if (thread->type == DMA_SG)
|
|
tx = dev->device_prep_dma_sg(chan, tx_sg, src_cnt,
|
|
rx_sg, src_cnt, flags);
|
|
else if (thread->type == DMA_XOR)
|
|
tx = dev->device_prep_dma_xor(chan,
|
|
dsts[0] + dst_off,
|
|
srcs, src_cnt,
|
|
len, flags);
|
|
else if (thread->type == DMA_PQ) {
|
|
dma_addr_t dma_pq[dst_cnt];
|
|
|
|
for (i = 0; i < dst_cnt; i++)
|
|
dma_pq[i] = dsts[i] + dst_off;
|
|
tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
|
|
src_cnt, pq_coefs,
|
|
len, flags);
|
|
}
|
|
|
|
if (!tx) {
|
|
dmaengine_unmap_put(um);
|
|
result("prep error", total_tests, src_off,
|
|
dst_off, len, ret);
|
|
msleep(100);
|
|
failed_tests++;
|
|
continue;
|
|
}
|
|
|
|
done.done = false;
|
|
tx->callback = dmatest_callback;
|
|
tx->callback_param = &done;
|
|
cookie = tx->tx_submit(tx);
|
|
|
|
if (dma_submit_error(cookie)) {
|
|
dmaengine_unmap_put(um);
|
|
result("submit error", total_tests, src_off,
|
|
dst_off, len, ret);
|
|
msleep(100);
|
|
failed_tests++;
|
|
continue;
|
|
}
|
|
dma_async_issue_pending(chan);
|
|
|
|
wait_event_freezable_timeout(done_wait, done.done,
|
|
msecs_to_jiffies(params->timeout));
|
|
|
|
status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
|
|
|
|
if (!done.done) {
|
|
/*
|
|
* We're leaving the timed out dma operation with
|
|
* dangling pointer to done_wait. To make this
|
|
* correct, we'll need to allocate wait_done for
|
|
* each test iteration and perform "who's gonna
|
|
* free it this time?" dancing. For now, just
|
|
* leave it dangling.
|
|
*/
|
|
dmaengine_unmap_put(um);
|
|
result("test timed out", total_tests, src_off, dst_off,
|
|
len, 0);
|
|
failed_tests++;
|
|
continue;
|
|
} else if (status != DMA_COMPLETE) {
|
|
dmaengine_unmap_put(um);
|
|
result(status == DMA_ERROR ?
|
|
"completion error status" :
|
|
"completion busy status", total_tests, src_off,
|
|
dst_off, len, ret);
|
|
failed_tests++;
|
|
continue;
|
|
}
|
|
|
|
dmaengine_unmap_put(um);
|
|
|
|
if (params->noverify) {
|
|
verbose_result("test passed", total_tests, src_off,
|
|
dst_off, len, 0);
|
|
continue;
|
|
}
|
|
|
|
start = ktime_get();
|
|
pr_debug("%s: verifying source buffer...\n", current->comm);
|
|
error_count = dmatest_verify(thread->srcs, 0, src_off,
|
|
0, PATTERN_SRC, true);
|
|
error_count += dmatest_verify(thread->srcs, src_off,
|
|
src_off + len, src_off,
|
|
PATTERN_SRC | PATTERN_COPY, true);
|
|
error_count += dmatest_verify(thread->srcs, src_off + len,
|
|
params->buf_size, src_off + len,
|
|
PATTERN_SRC, true);
|
|
|
|
pr_debug("%s: verifying dest buffer...\n", current->comm);
|
|
error_count += dmatest_verify(thread->dsts, 0, dst_off,
|
|
0, PATTERN_DST, false);
|
|
error_count += dmatest_verify(thread->dsts, dst_off,
|
|
dst_off + len, src_off,
|
|
PATTERN_SRC | PATTERN_COPY, false);
|
|
error_count += dmatest_verify(thread->dsts, dst_off + len,
|
|
params->buf_size, dst_off + len,
|
|
PATTERN_DST, false);
|
|
|
|
diff = ktime_sub(ktime_get(), start);
|
|
comparetime = ktime_add(comparetime, diff);
|
|
|
|
if (error_count) {
|
|
result("data error", total_tests, src_off, dst_off,
|
|
len, error_count);
|
|
failed_tests++;
|
|
} else {
|
|
verbose_result("test passed", total_tests, src_off,
|
|
dst_off, len, 0);
|
|
}
|
|
}
|
|
ktime = ktime_sub(ktime_get(), ktime);
|
|
ktime = ktime_sub(ktime, comparetime);
|
|
ktime = ktime_sub(ktime, filltime);
|
|
runtime = ktime_to_us(ktime);
|
|
|
|
ret = 0;
|
|
err_dstbuf:
|
|
for (i = 0; thread->udsts[i]; i++)
|
|
kfree(thread->udsts[i]);
|
|
kfree(thread->udsts);
|
|
err_udsts:
|
|
kfree(thread->dsts);
|
|
err_dsts:
|
|
err_srcbuf:
|
|
for (i = 0; thread->usrcs[i]; i++)
|
|
kfree(thread->usrcs[i]);
|
|
kfree(thread->usrcs);
|
|
err_usrcs:
|
|
kfree(thread->srcs);
|
|
err_srcs:
|
|
kfree(pq_coefs);
|
|
err_thread_type:
|
|
pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
|
|
current->comm, total_tests, failed_tests,
|
|
dmatest_persec(runtime, total_tests),
|
|
dmatest_KBs(runtime, total_len), ret);
|
|
|
|
/* terminate all transfers on specified channels */
|
|
if (ret)
|
|
dmaengine_terminate_all(chan);
|
|
|
|
thread->done = true;
|
|
wake_up(&thread_wait);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
|
|
{
|
|
struct dmatest_thread *thread;
|
|
struct dmatest_thread *_thread;
|
|
int ret;
|
|
|
|
list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
|
|
ret = kthread_stop(thread->task);
|
|
pr_debug("thread %s exited with status %d\n",
|
|
thread->task->comm, ret);
|
|
list_del(&thread->node);
|
|
put_task_struct(thread->task);
|
|
kfree(thread);
|
|
}
|
|
|
|
/* terminate all transfers on specified channels */
|
|
dmaengine_terminate_all(dtc->chan);
|
|
|
|
kfree(dtc);
|
|
}
|
|
|
|
static int dmatest_add_threads(struct dmatest_info *info,
|
|
struct dmatest_chan *dtc, enum dma_transaction_type type)
|
|
{
|
|
struct dmatest_params *params = &info->params;
|
|
struct dmatest_thread *thread;
|
|
struct dma_chan *chan = dtc->chan;
|
|
char *op;
|
|
unsigned int i;
|
|
|
|
if (type == DMA_MEMCPY)
|
|
op = "copy";
|
|
else if (type == DMA_SG)
|
|
op = "sg";
|
|
else if (type == DMA_XOR)
|
|
op = "xor";
|
|
else if (type == DMA_PQ)
|
|
op = "pq";
|
|
else
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < params->threads_per_chan; i++) {
|
|
thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
|
|
if (!thread) {
|
|
pr_warn("No memory for %s-%s%u\n",
|
|
dma_chan_name(chan), op, i);
|
|
break;
|
|
}
|
|
thread->info = info;
|
|
thread->chan = dtc->chan;
|
|
thread->type = type;
|
|
smp_wmb();
|
|
thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
|
|
dma_chan_name(chan), op, i);
|
|
if (IS_ERR(thread->task)) {
|
|
pr_warn("Failed to create thread %s-%s%u\n",
|
|
dma_chan_name(chan), op, i);
|
|
kfree(thread);
|
|
break;
|
|
}
|
|
|
|
/* srcbuf and dstbuf are allocated by the thread itself */
|
|
get_task_struct(thread->task);
|
|
list_add_tail(&thread->node, &dtc->threads);
|
|
wake_up_process(thread->task);
|
|
}
|
|
|
|
return i;
|
|
}
|
|
|
|
static int dmatest_add_channel(struct dmatest_info *info,
|
|
struct dma_chan *chan)
|
|
{
|
|
struct dmatest_chan *dtc;
|
|
struct dma_device *dma_dev = chan->device;
|
|
unsigned int thread_count = 0;
|
|
int cnt;
|
|
|
|
dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
|
|
if (!dtc) {
|
|
pr_warn("No memory for %s\n", dma_chan_name(chan));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
dtc->chan = chan;
|
|
INIT_LIST_HEAD(&dtc->threads);
|
|
|
|
if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
|
|
if (dmatest == 0) {
|
|
cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
|
|
thread_count += cnt > 0 ? cnt : 0;
|
|
}
|
|
}
|
|
|
|
if (dma_has_cap(DMA_SG, dma_dev->cap_mask)) {
|
|
if (dmatest == 1) {
|
|
cnt = dmatest_add_threads(info, dtc, DMA_SG);
|
|
thread_count += cnt > 0 ? cnt : 0;
|
|
}
|
|
}
|
|
|
|
if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
|
|
cnt = dmatest_add_threads(info, dtc, DMA_XOR);
|
|
thread_count += cnt > 0 ? cnt : 0;
|
|
}
|
|
if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
|
|
cnt = dmatest_add_threads(info, dtc, DMA_PQ);
|
|
thread_count += cnt > 0 ? cnt : 0;
|
|
}
|
|
|
|
pr_info("Started %u threads using %s\n",
|
|
thread_count, dma_chan_name(chan));
|
|
|
|
list_add_tail(&dtc->node, &info->channels);
|
|
info->nr_channels++;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static bool filter(struct dma_chan *chan, void *param)
|
|
{
|
|
struct dmatest_params *params = param;
|
|
|
|
if (!dmatest_match_channel(params, chan) ||
|
|
!dmatest_match_device(params, chan->device))
|
|
return false;
|
|
else
|
|
return true;
|
|
}
|
|
|
|
static void request_channels(struct dmatest_info *info,
|
|
enum dma_transaction_type type)
|
|
{
|
|
dma_cap_mask_t mask;
|
|
|
|
dma_cap_zero(mask);
|
|
dma_cap_set(type, mask);
|
|
for (;;) {
|
|
struct dmatest_params *params = &info->params;
|
|
struct dma_chan *chan;
|
|
|
|
chan = dma_request_channel(mask, filter, params);
|
|
if (chan) {
|
|
if (dmatest_add_channel(info, chan)) {
|
|
dma_release_channel(chan);
|
|
break; /* add_channel failed, punt */
|
|
}
|
|
} else
|
|
break; /* no more channels available */
|
|
if (params->max_channels &&
|
|
info->nr_channels >= params->max_channels)
|
|
break; /* we have all we need */
|
|
}
|
|
}
|
|
|
|
static void run_threaded_test(struct dmatest_info *info)
|
|
{
|
|
struct dmatest_params *params = &info->params;
|
|
|
|
/* Copy test parameters */
|
|
params->buf_size = test_buf_size;
|
|
strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
|
|
strlcpy(params->device, strim(test_device), sizeof(params->device));
|
|
params->threads_per_chan = threads_per_chan;
|
|
params->max_channels = max_channels;
|
|
params->iterations = iterations;
|
|
params->xor_sources = xor_sources;
|
|
params->pq_sources = pq_sources;
|
|
params->timeout = timeout;
|
|
params->noverify = noverify;
|
|
|
|
request_channels(info, DMA_MEMCPY);
|
|
request_channels(info, DMA_XOR);
|
|
request_channels(info, DMA_SG);
|
|
request_channels(info, DMA_PQ);
|
|
}
|
|
|
|
static void stop_threaded_test(struct dmatest_info *info)
|
|
{
|
|
struct dmatest_chan *dtc, *_dtc;
|
|
struct dma_chan *chan;
|
|
|
|
list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
|
|
list_del(&dtc->node);
|
|
chan = dtc->chan;
|
|
dmatest_cleanup_channel(dtc);
|
|
pr_debug("dropped channel %s\n", dma_chan_name(chan));
|
|
dma_release_channel(chan);
|
|
}
|
|
|
|
info->nr_channels = 0;
|
|
}
|
|
|
|
static void restart_threaded_test(struct dmatest_info *info, bool run)
|
|
{
|
|
/* we might be called early to set run=, defer running until all
|
|
* parameters have been evaluated
|
|
*/
|
|
if (!info->did_init)
|
|
return;
|
|
|
|
/* Stop any running test first */
|
|
stop_threaded_test(info);
|
|
|
|
/* Run test with new parameters */
|
|
run_threaded_test(info);
|
|
}
|
|
|
|
static int dmatest_run_get(char *val, const struct kernel_param *kp)
|
|
{
|
|
struct dmatest_info *info = &test_info;
|
|
|
|
mutex_lock(&info->lock);
|
|
if (is_threaded_test_run(info)) {
|
|
dmatest_run = true;
|
|
} else {
|
|
stop_threaded_test(info);
|
|
dmatest_run = false;
|
|
}
|
|
mutex_unlock(&info->lock);
|
|
|
|
return param_get_bool(val, kp);
|
|
}
|
|
|
|
static int dmatest_run_set(const char *val, const struct kernel_param *kp)
|
|
{
|
|
struct dmatest_info *info = &test_info;
|
|
int ret;
|
|
|
|
mutex_lock(&info->lock);
|
|
ret = param_set_bool(val, kp);
|
|
if (ret) {
|
|
mutex_unlock(&info->lock);
|
|
return ret;
|
|
}
|
|
|
|
if (is_threaded_test_run(info))
|
|
ret = -EBUSY;
|
|
else if (dmatest_run)
|
|
restart_threaded_test(info, dmatest_run);
|
|
|
|
mutex_unlock(&info->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __init dmatest_init(void)
|
|
{
|
|
struct dmatest_info *info = &test_info;
|
|
struct dmatest_params *params = &info->params;
|
|
|
|
if (dmatest_run) {
|
|
mutex_lock(&info->lock);
|
|
run_threaded_test(info);
|
|
mutex_unlock(&info->lock);
|
|
}
|
|
|
|
if (params->iterations && wait)
|
|
wait_event(thread_wait, !is_threaded_test_run(info));
|
|
|
|
/* module parameters are stable, inittime tests are started,
|
|
* let userspace take over 'run' control
|
|
*/
|
|
info->did_init = true;
|
|
|
|
return 0;
|
|
}
|
|
/* when compiled-in wait for drivers to load first */
|
|
late_initcall(dmatest_init);
|
|
|
|
static void __exit dmatest_exit(void)
|
|
{
|
|
struct dmatest_info *info = &test_info;
|
|
|
|
mutex_lock(&info->lock);
|
|
stop_threaded_test(info);
|
|
mutex_unlock(&info->lock);
|
|
}
|
|
module_exit(dmatest_exit);
|
|
|
|
MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
|
|
MODULE_LICENSE("GPL v2");
|