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![Minghuan Lian](/assets/img/avatar_default.png)
Some kind of Freescale Layerscape SoC provides a MSI implementation which uses two SCFG registers MSIIR and MSIR to support 32 MSI interrupts for each PCIe controller. The patch is to support it. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Tested-by: Alexander Stein <alexander.stein@systec-electronic.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
240 lines
5.8 KiB
C
240 lines
5.8 KiB
C
/*
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* Freescale SCFG MSI(-X) support
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*
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* Copyright (C) 2016 Freescale Semiconductor.
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*
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* Author: Minghuan Lian <Minghuan.Lian@nxp.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/msi.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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#include <linux/spinlock.h>
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#define MSI_MAX_IRQS 32
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#define MSI_IBS_SHIFT 3
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#define MSIR 4
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struct ls_scfg_msi {
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spinlock_t lock;
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struct platform_device *pdev;
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struct irq_domain *parent;
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struct irq_domain *msi_domain;
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void __iomem *regs;
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phys_addr_t msiir_addr;
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int irq;
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DECLARE_BITMAP(used, MSI_MAX_IRQS);
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};
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static struct irq_chip ls_scfg_msi_irq_chip = {
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.name = "MSI",
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.irq_mask = pci_msi_mask_irq,
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.irq_unmask = pci_msi_unmask_irq,
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};
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static struct msi_domain_info ls_scfg_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
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MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX),
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.chip = &ls_scfg_msi_irq_chip,
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};
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static void ls_scfg_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
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{
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struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(data);
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msg->address_hi = upper_32_bits(msi_data->msiir_addr);
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msg->address_lo = lower_32_bits(msi_data->msiir_addr);
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msg->data = data->hwirq << MSI_IBS_SHIFT;
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}
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static int ls_scfg_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static struct irq_chip ls_scfg_msi_parent_chip = {
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.name = "SCFG",
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.irq_compose_msi_msg = ls_scfg_msi_compose_msg,
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.irq_set_affinity = ls_scfg_msi_set_affinity,
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};
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static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain,
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unsigned int virq,
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unsigned int nr_irqs,
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void *args)
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{
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struct ls_scfg_msi *msi_data = domain->host_data;
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int pos, err = 0;
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WARN_ON(nr_irqs != 1);
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spin_lock(&msi_data->lock);
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pos = find_first_zero_bit(msi_data->used, MSI_MAX_IRQS);
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if (pos < MSI_MAX_IRQS)
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__set_bit(pos, msi_data->used);
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else
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err = -ENOSPC;
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spin_unlock(&msi_data->lock);
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if (err)
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return err;
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irq_domain_set_info(domain, virq, pos,
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&ls_scfg_msi_parent_chip, msi_data,
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handle_simple_irq, NULL, NULL);
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return 0;
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}
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static void ls_scfg_msi_domain_irq_free(struct irq_domain *domain,
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unsigned int virq, unsigned int nr_irqs)
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{
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struct irq_data *d = irq_domain_get_irq_data(domain, virq);
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struct ls_scfg_msi *msi_data = irq_data_get_irq_chip_data(d);
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int pos;
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pos = d->hwirq;
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if (pos < 0 || pos >= MSI_MAX_IRQS) {
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pr_err("failed to teardown msi. Invalid hwirq %d\n", pos);
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return;
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}
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spin_lock(&msi_data->lock);
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__clear_bit(pos, msi_data->used);
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spin_unlock(&msi_data->lock);
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}
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static const struct irq_domain_ops ls_scfg_msi_domain_ops = {
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.alloc = ls_scfg_msi_domain_irq_alloc,
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.free = ls_scfg_msi_domain_irq_free,
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};
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static void ls_scfg_msi_irq_handler(struct irq_desc *desc)
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{
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struct ls_scfg_msi *msi_data = irq_desc_get_handler_data(desc);
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unsigned long val;
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int pos, virq;
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chained_irq_enter(irq_desc_get_chip(desc), desc);
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val = ioread32be(msi_data->regs + MSIR);
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for_each_set_bit(pos, &val, MSI_MAX_IRQS) {
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virq = irq_find_mapping(msi_data->parent, (31 - pos));
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if (virq)
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generic_handle_irq(virq);
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}
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chained_irq_exit(irq_desc_get_chip(desc), desc);
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}
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static int ls_scfg_msi_domains_init(struct ls_scfg_msi *msi_data)
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{
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/* Initialize MSI domain parent */
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msi_data->parent = irq_domain_add_linear(NULL,
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MSI_MAX_IRQS,
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&ls_scfg_msi_domain_ops,
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msi_data);
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if (!msi_data->parent) {
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dev_err(&msi_data->pdev->dev, "failed to create IRQ domain\n");
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return -ENOMEM;
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}
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msi_data->msi_domain = pci_msi_create_irq_domain(
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of_node_to_fwnode(msi_data->pdev->dev.of_node),
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&ls_scfg_msi_domain_info,
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msi_data->parent);
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if (!msi_data->msi_domain) {
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dev_err(&msi_data->pdev->dev, "failed to create MSI domain\n");
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irq_domain_remove(msi_data->parent);
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return -ENOMEM;
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}
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return 0;
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}
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static int ls_scfg_msi_probe(struct platform_device *pdev)
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{
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struct ls_scfg_msi *msi_data;
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struct resource *res;
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int ret;
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msi_data = devm_kzalloc(&pdev->dev, sizeof(*msi_data), GFP_KERNEL);
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if (!msi_data)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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msi_data->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(msi_data->regs)) {
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dev_err(&pdev->dev, "failed to initialize 'regs'\n");
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return PTR_ERR(msi_data->regs);
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}
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msi_data->msiir_addr = res->start;
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msi_data->irq = platform_get_irq(pdev, 0);
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if (msi_data->irq <= 0) {
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dev_err(&pdev->dev, "failed to get MSI irq\n");
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return -ENODEV;
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}
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msi_data->pdev = pdev;
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spin_lock_init(&msi_data->lock);
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ret = ls_scfg_msi_domains_init(msi_data);
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if (ret)
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return ret;
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irq_set_chained_handler_and_data(msi_data->irq,
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ls_scfg_msi_irq_handler,
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msi_data);
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platform_set_drvdata(pdev, msi_data);
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return 0;
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}
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static int ls_scfg_msi_remove(struct platform_device *pdev)
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{
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struct ls_scfg_msi *msi_data = platform_get_drvdata(pdev);
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irq_set_chained_handler_and_data(msi_data->irq, NULL, NULL);
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irq_domain_remove(msi_data->msi_domain);
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irq_domain_remove(msi_data->parent);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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static const struct of_device_id ls_scfg_msi_id[] = {
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{ .compatible = "fsl,1s1021a-msi", },
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{ .compatible = "fsl,1s1043a-msi", },
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{},
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};
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static struct platform_driver ls_scfg_msi_driver = {
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.driver = {
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.name = "ls-scfg-msi",
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.of_match_table = ls_scfg_msi_id,
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},
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.probe = ls_scfg_msi_probe,
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.remove = ls_scfg_msi_remove,
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};
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module_platform_driver(ls_scfg_msi_driver);
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MODULE_AUTHOR("Minghuan Lian <Minghuan.Lian@nxp.com>");
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MODULE_DESCRIPTION("Freescale Layerscape SCFG MSI controller driver");
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MODULE_LICENSE("GPL v2");
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