linux-stable/drivers/dma/dw
Cezary Rojewski b6c14d7a83 dmaengine dw: Revert "dmaengine: dw: Enable runtime PM"
This reverts commit 842067940a.
For some solutions e.g. sound/soc/intel/catpt, DW DMA is part of a
compound device (in that very example, domains: ADSP, SSP0, SSP1, DMA0
and DMA1 are part of a single entity) rather than being a standalone
one. Driver for said device may enlist DMA to transfer data during
suspend or resume sequences.

Manipulating RPM explicitly in dw's DMA request and release channel
functions causes suspend() to also invoke resume() for the exact same
device. Similar situation occurs for resume() sequence. Effectively
renders device dysfunctional after first suspend() attempt. Revert the
change to address the problem.

Fixes: 842067940a ("dmaengine: dw: Enable runtime PM")
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20210203191924.15706-1-cezary.rojewski@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-08 17:36:12 +05:30
..
acpi.c dmaengine: dw: Register ACPI DMA controller for PCI that has companion 2020-06-16 21:54:47 +05:30
core.c dmaengine dw: Revert "dmaengine: dw: Enable runtime PM" 2021-02-08 17:36:12 +05:30
dw.c dmaengine: dw: Ignore burst setting for memory peripherals 2020-08-17 11:58:31 +05:30
idma32.c dmaengine: dw: Ignore burst setting for memory peripherals 2020-08-17 11:58:31 +05:30
internal.h dmaengine: dw: platform: Split OF helpers to separate module 2019-08-21 09:41:28 +05:30
Kconfig dmaengine: dw: convert to SPDX identifiers 2019-01-07 17:57:13 +05:30
Makefile dmaengine: dw: Replace 'objs' by 'y' 2020-06-16 21:54:47 +05:30
of.c dmaengine: dw: Add DMA-channels mask cell support 2020-08-17 11:58:31 +05:30
pci.c dmaengine: dw: Register ACPI DMA controller for PCI that has companion 2020-06-16 21:54:47 +05:30
platform.c dmaengine: dw: platform: Mark 'hclk' clock optional 2019-10-14 13:51:44 +05:30
regs.h dmaengine: dw: Introduce max burst length hw config 2020-07-27 14:30:55 +05:30