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9b9d8632f5
This patch includes the sequence for clock tuning and the dynamic training mechanism for the clock above 800MHz. And historically there have been different sequences to change the EMC clock. The sequence to be used is specified in the EMC table. However, for the currently supported upstreaming platform, only the most recent sequence is used. So only support that in this patch. Based on the work of Peter De Schrijver <pdeschrijver@nvidia.com>. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
21 lines
827 B
Makefile
21 lines
827 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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tegra-mc-y := mc.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o
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tegra-mc-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
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obj-$(CONFIG_TEGRA_MC) += tegra-mc.o
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obj-$(CONFIG_TEGRA20_EMC) += tegra20-emc.o
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obj-$(CONFIG_TEGRA30_EMC) += tegra30-emc.o
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obj-$(CONFIG_TEGRA124_EMC) += tegra124-emc.o
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obj-$(CONFIG_TEGRA210_EMC_TABLE) += tegra210-emc-table.o
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obj-$(CONFIG_TEGRA210_EMC) += tegra210-emc.o
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obj-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186.o tegra186-emc.o
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obj-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra186.o tegra186-emc.o
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tegra210-emc-y := tegra210-emc-core.o tegra210-emc-cc-r21021.o
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