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![Linus Torvalds](/assets/img/avatar_default.png)
- Expose tag address bits in siginfo. The original arm64 ABI did not expose any of the bits 63:56 of a tagged address in siginfo. In the presence of user ASAN or MTE, this information may be useful. The implementation is generic to other architectures supporting tags (like SPARC ADI, subject to wiring up the arch code). The user will have to opt in via sigaction(SA_EXPOSE_TAGBITS) so that the extra bits, if available, become visible in si_addr. - Default to 32-bit wide ZONE_DMA. Previously, ZONE_DMA was set to the lowest 1GB to cope with the Raspberry Pi 4 limitations, to the detriment of other platforms. With these changes, the kernel scans the Device Tree dma-ranges and the ACPI IORT information before deciding on a smaller ZONE_DMA. - Strengthen READ_ONCE() to acquire when CONFIG_LTO=y. When building with LTO, there is an increased risk of the compiler converting an address dependency headed by a READ_ONCE() invocation into a control dependency and consequently allowing for harmful reordering by the CPU. - Add CPPC FFH support using arm64 AMU counters. - set_fs() removal on arm64. This renders the User Access Override (UAO) ARMv8 feature unnecessary. - Perf updates: PMU driver for the ARM DMC-620 memory controller, sysfs identifier file for SMMUv3, stop event counters support for i.MX8MP, enable the perf events-based hard lockup detector. - Reorganise the kernel VA space slightly so that 52-bit VA configurations can use more virtual address space. - Improve the robustness of the arm64 memory offline event notifier. - Pad the Image header to 64K following the EFI header definition updated recently to increase the section alignment to 64K. - Support CONFIG_CMDLINE_EXTEND on arm64. - Do not use tagged PC in the kernel (TCR_EL1.TBID1==1), freeing up 8 bits for PtrAuth. - Switch to vmapped shadow call stacks. - Miscellaneous clean-ups. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl/XcSgACgkQa9axLQDI XvGkwg//SLknimELD/cphf2UzZm5RFuCU0x1UnIXs9XYo5BrOpgVLLA//+XkCrKN 0GLAdtBDfw1axWJudzgMBiHrv6wSGh4p3YWjLIW06u/PJu3m3U8oiiolvvF8d7Yq UKDseKGQnQkrl97J0SyA+Da/u8D11GEzp52SWL5iRxzt6vInEC27iTOp9n1yoaoP f3y7qdp9kv831ryUM3rXFYpc8YuMWXk+JpBSNaxqmjlvjMzipA5PhzBLmNzfc657 XcrRX5qsgjEeJW8UUnWUVNB42j7tVzN77yraoUpoVVCzZZeWOQxqq5EscKPfIhRt AjtSIQNOs95ZVE0SFCTjXnUUb823coUs4dMCdftqlE62JNRwdR+3bkfa+QjPTg1F O9ohW1AzX0/JB19QBxMaOgbheB8GFXh3DVJ6pizTgxJgyPvQQtFuEhT1kq8Cst0U Pe+pEWsg9t41bUXNz+/l9tUWKWpeCfFNMTrBXLmXrNlTLeOvDh/0UiF0+2lYJYgf YAboibQ5eOv2wGCcSDEbNMJ6B2/6GtubDJxH4du680F6Emb6pCSw0ntPwB7mSGLG 5dXz+9FJxDLjmxw7BXxQgc5MoYIrt5JQtaOQ6UxU8dPy53/+py4Ck6tXNkz0+Ap7 gPPaGGy1GqobQFu3qlHtOK1VleQi/sWcrpmPHrpiiFUf6N7EmcY= =zXFk -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - Expose tag address bits in siginfo. The original arm64 ABI did not expose any of the bits 63:56 of a tagged address in siginfo. In the presence of user ASAN or MTE, this information may be useful. The implementation is generic to other architectures supporting tags (like SPARC ADI, subject to wiring up the arch code). The user will have to opt in via sigaction(SA_EXPOSE_TAGBITS) so that the extra bits, if available, become visible in si_addr. - Default to 32-bit wide ZONE_DMA. Previously, ZONE_DMA was set to the lowest 1GB to cope with the Raspberry Pi 4 limitations, to the detriment of other platforms. With these changes, the kernel scans the Device Tree dma-ranges and the ACPI IORT information before deciding on a smaller ZONE_DMA. - Strengthen READ_ONCE() to acquire when CONFIG_LTO=y. When building with LTO, there is an increased risk of the compiler converting an address dependency headed by a READ_ONCE() invocation into a control dependency and consequently allowing for harmful reordering by the CPU. - Add CPPC FFH support using arm64 AMU counters. - set_fs() removal on arm64. This renders the User Access Override (UAO) ARMv8 feature unnecessary. - Perf updates: PMU driver for the ARM DMC-620 memory controller, sysfs identifier file for SMMUv3, stop event counters support for i.MX8MP, enable the perf events-based hard lockup detector. - Reorganise the kernel VA space slightly so that 52-bit VA configurations can use more virtual address space. - Improve the robustness of the arm64 memory offline event notifier. - Pad the Image header to 64K following the EFI header definition updated recently to increase the section alignment to 64K. - Support CONFIG_CMDLINE_EXTEND on arm64. - Do not use tagged PC in the kernel (TCR_EL1.TBID1==1), freeing up 8 bits for PtrAuth. - Switch to vmapped shadow call stacks. - Miscellaneous clean-ups. * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (78 commits) perf/imx_ddr: Add system PMU identifier for userspace bindings: perf: imx-ddr: add compatible string arm64: Fix build failure when HARDLOCKUP_DETECTOR_PERF is enabled arm64: mte: fix prctl(PR_GET_TAGGED_ADDR_CTRL) if TCF0=NONE arm64: mark __system_matches_cap as __maybe_unused arm64: uaccess: remove vestigal UAO support arm64: uaccess: remove redundant PAN toggling arm64: uaccess: remove addr_limit_user_check() arm64: uaccess: remove set_fs() arm64: uaccess cleanup macro naming arm64: uaccess: split user/kernel routines arm64: uaccess: refactor __{get,put}_user arm64: uaccess: simplify __copy_user_flushcache() arm64: uaccess: rename privileged uaccess routines arm64: sdei: explicitly simulate PAN/UAO entry arm64: sdei: move uaccess logic to arch/arm64/ arm64: head.S: always initialize PSTATE arm64: head.S: cleanup SCTLR_ELx initialization arm64: head.S: rename el2_setup -> init_kernel_el arm64: add C wrappers for SET_PSTATE_*() ...
1096 lines
27 KiB
C
1096 lines
27 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#define pr_fmt(fmt) "OF: " fmt
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#include <linux/device.h>
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#include <linux/fwnode.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/logic_pio.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/pci.h>
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#include <linux/pci_regs.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/dma-direct.h> /* for bus_dma_region */
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#include "of_private.h"
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/* Max address size we deal with */
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#define OF_MAX_ADDR_CELLS 4
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#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
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#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
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static struct of_bus *of_match_bus(struct device_node *np);
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static int __of_address_to_resource(struct device_node *dev,
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const __be32 *addrp, u64 size, unsigned int flags,
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const char *name, struct resource *r);
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/* Debug utility */
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#ifdef DEBUG
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static void of_dump_addr(const char *s, const __be32 *addr, int na)
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{
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pr_debug("%s", s);
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while (na--)
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pr_cont(" %08x", be32_to_cpu(*(addr++)));
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pr_cont("\n");
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}
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#else
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static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
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#endif
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/* Callbacks for bus specific translators */
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struct of_bus {
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const char *name;
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const char *addresses;
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int (*match)(struct device_node *parent);
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void (*count_cells)(struct device_node *child,
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int *addrc, int *sizec);
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u64 (*map)(__be32 *addr, const __be32 *range,
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int na, int ns, int pna);
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int (*translate)(__be32 *addr, u64 offset, int na);
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bool has_flags;
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unsigned int (*get_flags)(const __be32 *addr);
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};
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/*
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* Default translator (generic bus)
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*/
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static void of_bus_default_count_cells(struct device_node *dev,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = of_n_addr_cells(dev);
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if (sizec)
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*sizec = of_n_size_cells(dev);
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}
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static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
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int na, int ns, int pna)
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{
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u64 cp, s, da;
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cp = of_read_number(range, na);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr, na);
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pr_debug("default map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
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{
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u64 a = of_read_number(addr, na);
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memset(addr, 0, na * 4);
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a += offset;
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if (na > 1)
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addr[na - 2] = cpu_to_be32(a >> 32);
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addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
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return 0;
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}
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static unsigned int of_bus_default_get_flags(const __be32 *addr)
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{
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return IORESOURCE_MEM;
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}
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#ifdef CONFIG_PCI
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static unsigned int of_bus_pci_get_flags(const __be32 *addr)
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{
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unsigned int flags = 0;
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u32 w = be32_to_cpup(addr);
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if (!IS_ENABLED(CONFIG_PCI))
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return 0;
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switch((w >> 24) & 0x03) {
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case 0x01:
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flags |= IORESOURCE_IO;
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break;
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case 0x02: /* 32 bits */
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case 0x03: /* 64 bits */
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flags |= IORESOURCE_MEM;
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break;
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}
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if (w & 0x40000000)
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flags |= IORESOURCE_PREFETCH;
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return flags;
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}
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/*
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* PCI bus specific translator
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*/
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static bool of_node_is_pcie(struct device_node *np)
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{
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bool is_pcie = of_node_name_eq(np, "pcie");
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if (is_pcie)
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pr_warn_once("%pOF: Missing device_type\n", np);
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return is_pcie;
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}
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static int of_bus_pci_match(struct device_node *np)
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{
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/*
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* "pciex" is PCI Express
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* "vci" is for the /chaos bridge on 1st-gen PCI powermacs
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* "ht" is hypertransport
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*
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* If none of the device_type match, and that the node name is
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* "pcie", accept the device as PCI (with a warning).
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*/
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return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") ||
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of_node_is_type(np, "vci") || of_node_is_type(np, "ht") ||
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of_node_is_pcie(np);
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}
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static void of_bus_pci_count_cells(struct device_node *np,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 3;
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if (sizec)
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*sizec = 2;
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}
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static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
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int pna)
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{
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u64 cp, s, da;
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unsigned int af, rf;
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af = of_bus_pci_get_flags(addr);
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rf = of_bus_pci_get_flags(range);
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/* Check address type match */
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if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
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return OF_BAD_ADDR;
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/* Read address values, skipping high cell */
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cp = of_read_number(range + 1, na - 1);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr + 1, na - 1);
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pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
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{
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return of_bus_default_translate(addr + 1, offset, na - 1);
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}
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const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
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unsigned int *flags)
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{
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const __be32 *prop;
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unsigned int psize;
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struct device_node *parent;
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struct of_bus *bus;
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int onesize, i, na, ns;
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/* Get parent & match bus type */
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parent = of_get_parent(dev);
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if (parent == NULL)
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return NULL;
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bus = of_match_bus(parent);
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if (strcmp(bus->name, "pci")) {
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of_node_put(parent);
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return NULL;
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}
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bus->count_cells(dev, &na, &ns);
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of_node_put(parent);
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if (!OF_CHECK_ADDR_COUNT(na))
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return NULL;
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/* Get "reg" or "assigned-addresses" property */
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prop = of_get_property(dev, bus->addresses, &psize);
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if (prop == NULL)
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return NULL;
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psize /= 4;
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onesize = na + ns;
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for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
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u32 val = be32_to_cpu(prop[0]);
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if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
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if (size)
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*size = of_read_number(prop + na, ns);
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if (flags)
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*flags = bus->get_flags(prop);
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return prop;
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL(of_get_pci_address);
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int of_pci_address_to_resource(struct device_node *dev, int bar,
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struct resource *r)
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{
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const __be32 *addrp;
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u64 size;
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unsigned int flags;
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addrp = of_get_pci_address(dev, bar, &size, &flags);
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if (addrp == NULL)
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return -EINVAL;
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return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
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}
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EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
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/*
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* of_pci_range_to_resource - Create a resource from an of_pci_range
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* @range: the PCI range that describes the resource
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* @np: device node where the range belongs to
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* @res: pointer to a valid resource that will be updated to
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* reflect the values contained in the range.
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*
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* Returns EINVAL if the range cannot be converted to resource.
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*
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* Note that if the range is an IO range, the resource will be converted
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* using pci_address_to_pio() which can fail if it is called too early or
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* if the range cannot be matched to any host bridge IO space (our case here).
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* To guard against that we try to register the IO range first.
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* If that fails we know that pci_address_to_pio() will do too.
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*/
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int of_pci_range_to_resource(struct of_pci_range *range,
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struct device_node *np, struct resource *res)
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{
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int err;
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res->flags = range->flags;
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res->parent = res->child = res->sibling = NULL;
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res->name = np->full_name;
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if (res->flags & IORESOURCE_IO) {
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unsigned long port;
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err = pci_register_io_range(&np->fwnode, range->cpu_addr,
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range->size);
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if (err)
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goto invalid_range;
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port = pci_address_to_pio(range->cpu_addr);
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if (port == (unsigned long)-1) {
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err = -EINVAL;
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goto invalid_range;
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}
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res->start = port;
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} else {
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if ((sizeof(resource_size_t) < 8) &&
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upper_32_bits(range->cpu_addr)) {
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err = -EINVAL;
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goto invalid_range;
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}
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res->start = range->cpu_addr;
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}
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res->end = res->start + range->size - 1;
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return 0;
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invalid_range:
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res->start = (resource_size_t)OF_BAD_ADDR;
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res->end = (resource_size_t)OF_BAD_ADDR;
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return err;
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}
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EXPORT_SYMBOL(of_pci_range_to_resource);
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#endif /* CONFIG_PCI */
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/*
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* ISA bus specific translator
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*/
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static int of_bus_isa_match(struct device_node *np)
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{
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return of_node_name_eq(np, "isa");
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}
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static void of_bus_isa_count_cells(struct device_node *child,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 2;
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if (sizec)
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*sizec = 1;
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}
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static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
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int pna)
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{
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u64 cp, s, da;
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/* Check address type match */
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if ((addr[0] ^ range[0]) & cpu_to_be32(1))
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return OF_BAD_ADDR;
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/* Read address values, skipping high cell */
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cp = of_read_number(range + 1, na - 1);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr + 1, na - 1);
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pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
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{
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return of_bus_default_translate(addr + 1, offset, na - 1);
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}
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static unsigned int of_bus_isa_get_flags(const __be32 *addr)
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{
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unsigned int flags = 0;
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u32 w = be32_to_cpup(addr);
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if (w & 1)
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flags |= IORESOURCE_IO;
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else
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flags |= IORESOURCE_MEM;
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return flags;
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}
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/*
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* Array of bus specific translators
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*/
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static struct of_bus of_busses[] = {
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#ifdef CONFIG_PCI
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/* PCI */
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{
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.name = "pci",
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.addresses = "assigned-addresses",
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.match = of_bus_pci_match,
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.count_cells = of_bus_pci_count_cells,
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.map = of_bus_pci_map,
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.translate = of_bus_pci_translate,
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.has_flags = true,
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.get_flags = of_bus_pci_get_flags,
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},
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#endif /* CONFIG_PCI */
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/* ISA */
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{
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.name = "isa",
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.addresses = "reg",
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.match = of_bus_isa_match,
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.count_cells = of_bus_isa_count_cells,
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.map = of_bus_isa_map,
|
|
.translate = of_bus_isa_translate,
|
|
.has_flags = true,
|
|
.get_flags = of_bus_isa_get_flags,
|
|
},
|
|
/* Default */
|
|
{
|
|
.name = "default",
|
|
.addresses = "reg",
|
|
.match = NULL,
|
|
.count_cells = of_bus_default_count_cells,
|
|
.map = of_bus_default_map,
|
|
.translate = of_bus_default_translate,
|
|
.get_flags = of_bus_default_get_flags,
|
|
},
|
|
};
|
|
|
|
static struct of_bus *of_match_bus(struct device_node *np)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(of_busses); i++)
|
|
if (!of_busses[i].match || of_busses[i].match(np))
|
|
return &of_busses[i];
|
|
BUG();
|
|
return NULL;
|
|
}
|
|
|
|
static int of_empty_ranges_quirk(struct device_node *np)
|
|
{
|
|
if (IS_ENABLED(CONFIG_PPC)) {
|
|
/* To save cycles, we cache the result for global "Mac" setting */
|
|
static int quirk_state = -1;
|
|
|
|
/* PA-SEMI sdc DT bug */
|
|
if (of_device_is_compatible(np, "1682m-sdc"))
|
|
return true;
|
|
|
|
/* Make quirk cached */
|
|
if (quirk_state < 0)
|
|
quirk_state =
|
|
of_machine_is_compatible("Power Macintosh") ||
|
|
of_machine_is_compatible("MacRISC");
|
|
return quirk_state;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
static int of_translate_one(struct device_node *parent, struct of_bus *bus,
|
|
struct of_bus *pbus, __be32 *addr,
|
|
int na, int ns, int pna, const char *rprop)
|
|
{
|
|
const __be32 *ranges;
|
|
unsigned int rlen;
|
|
int rone;
|
|
u64 offset = OF_BAD_ADDR;
|
|
|
|
/*
|
|
* Normally, an absence of a "ranges" property means we are
|
|
* crossing a non-translatable boundary, and thus the addresses
|
|
* below the current cannot be converted to CPU physical ones.
|
|
* Unfortunately, while this is very clear in the spec, it's not
|
|
* what Apple understood, and they do have things like /uni-n or
|
|
* /ht nodes with no "ranges" property and a lot of perfectly
|
|
* useable mapped devices below them. Thus we treat the absence of
|
|
* "ranges" as equivalent to an empty "ranges" property which means
|
|
* a 1:1 translation at that level. It's up to the caller not to try
|
|
* to translate addresses that aren't supposed to be translated in
|
|
* the first place. --BenH.
|
|
*
|
|
* As far as we know, this damage only exists on Apple machines, so
|
|
* This code is only enabled on powerpc. --gcl
|
|
*
|
|
* This quirk also applies for 'dma-ranges' which frequently exist in
|
|
* child nodes without 'dma-ranges' in the parent nodes. --RobH
|
|
*/
|
|
ranges = of_get_property(parent, rprop, &rlen);
|
|
if (ranges == NULL && !of_empty_ranges_quirk(parent) &&
|
|
strcmp(rprop, "dma-ranges")) {
|
|
pr_debug("no ranges; cannot translate\n");
|
|
return 1;
|
|
}
|
|
if (ranges == NULL || rlen == 0) {
|
|
offset = of_read_number(addr, na);
|
|
memset(addr, 0, pna * 4);
|
|
pr_debug("empty ranges; 1:1 translation\n");
|
|
goto finish;
|
|
}
|
|
|
|
pr_debug("walking ranges...\n");
|
|
|
|
/* Now walk through the ranges */
|
|
rlen /= 4;
|
|
rone = na + pna + ns;
|
|
for (; rlen >= rone; rlen -= rone, ranges += rone) {
|
|
offset = bus->map(addr, ranges, na, ns, pna);
|
|
if (offset != OF_BAD_ADDR)
|
|
break;
|
|
}
|
|
if (offset == OF_BAD_ADDR) {
|
|
pr_debug("not found !\n");
|
|
return 1;
|
|
}
|
|
memcpy(addr, ranges + na, 4 * pna);
|
|
|
|
finish:
|
|
of_dump_addr("parent translation for:", addr, pna);
|
|
pr_debug("with offset: %llx\n", (unsigned long long)offset);
|
|
|
|
/* Translate it into parent bus space */
|
|
return pbus->translate(addr, offset, pna);
|
|
}
|
|
|
|
/*
|
|
* Translate an address from the device-tree into a CPU physical address,
|
|
* this walks up the tree and applies the various bus mappings on the
|
|
* way.
|
|
*
|
|
* Note: We consider that crossing any level with #size-cells == 0 to mean
|
|
* that translation is impossible (that is we are not dealing with a value
|
|
* that can be mapped to a cpu physical address). This is not really specified
|
|
* that way, but this is traditionally the way IBM at least do things
|
|
*
|
|
* Whenever the translation fails, the *host pointer will be set to the
|
|
* device that had registered logical PIO mapping, and the return code is
|
|
* relative to that node.
|
|
*/
|
|
static u64 __of_translate_address(struct device_node *dev,
|
|
struct device_node *(*get_parent)(const struct device_node *),
|
|
const __be32 *in_addr, const char *rprop,
|
|
struct device_node **host)
|
|
{
|
|
struct device_node *parent = NULL;
|
|
struct of_bus *bus, *pbus;
|
|
__be32 addr[OF_MAX_ADDR_CELLS];
|
|
int na, ns, pna, pns;
|
|
u64 result = OF_BAD_ADDR;
|
|
|
|
pr_debug("** translation for device %pOF **\n", dev);
|
|
|
|
/* Increase refcount at current level */
|
|
of_node_get(dev);
|
|
|
|
*host = NULL;
|
|
/* Get parent & match bus type */
|
|
parent = get_parent(dev);
|
|
if (parent == NULL)
|
|
goto bail;
|
|
bus = of_match_bus(parent);
|
|
|
|
/* Count address cells & copy address locally */
|
|
bus->count_cells(dev, &na, &ns);
|
|
if (!OF_CHECK_COUNTS(na, ns)) {
|
|
pr_debug("Bad cell count for %pOF\n", dev);
|
|
goto bail;
|
|
}
|
|
memcpy(addr, in_addr, na * 4);
|
|
|
|
pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n",
|
|
bus->name, na, ns, parent);
|
|
of_dump_addr("translating address:", addr, na);
|
|
|
|
/* Translate */
|
|
for (;;) {
|
|
struct logic_pio_hwaddr *iorange;
|
|
|
|
/* Switch to parent bus */
|
|
of_node_put(dev);
|
|
dev = parent;
|
|
parent = get_parent(dev);
|
|
|
|
/* If root, we have finished */
|
|
if (parent == NULL) {
|
|
pr_debug("reached root node\n");
|
|
result = of_read_number(addr, na);
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* For indirectIO device which has no ranges property, get
|
|
* the address from reg directly.
|
|
*/
|
|
iorange = find_io_range_by_fwnode(&dev->fwnode);
|
|
if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) {
|
|
result = of_read_number(addr + 1, na - 1);
|
|
pr_debug("indirectIO matched(%pOF) 0x%llx\n",
|
|
dev, result);
|
|
*host = of_node_get(dev);
|
|
break;
|
|
}
|
|
|
|
/* Get new parent bus and counts */
|
|
pbus = of_match_bus(parent);
|
|
pbus->count_cells(dev, &pna, &pns);
|
|
if (!OF_CHECK_COUNTS(pna, pns)) {
|
|
pr_err("Bad cell count for %pOF\n", dev);
|
|
break;
|
|
}
|
|
|
|
pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n",
|
|
pbus->name, pna, pns, parent);
|
|
|
|
/* Apply bus translation */
|
|
if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
|
|
break;
|
|
|
|
/* Complete the move up one level */
|
|
na = pna;
|
|
ns = pns;
|
|
bus = pbus;
|
|
|
|
of_dump_addr("one level translation:", addr, na);
|
|
}
|
|
bail:
|
|
of_node_put(parent);
|
|
of_node_put(dev);
|
|
|
|
return result;
|
|
}
|
|
|
|
u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
|
|
{
|
|
struct device_node *host;
|
|
u64 ret;
|
|
|
|
ret = __of_translate_address(dev, of_get_parent,
|
|
in_addr, "ranges", &host);
|
|
if (host) {
|
|
of_node_put(host);
|
|
return OF_BAD_ADDR;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(of_translate_address);
|
|
|
|
static struct device_node *__of_get_dma_parent(const struct device_node *np)
|
|
{
|
|
struct of_phandle_args args;
|
|
int ret, index;
|
|
|
|
index = of_property_match_string(np, "interconnect-names", "dma-mem");
|
|
if (index < 0)
|
|
return of_get_parent(np);
|
|
|
|
ret = of_parse_phandle_with_args(np, "interconnects",
|
|
"#interconnect-cells",
|
|
index, &args);
|
|
if (ret < 0)
|
|
return of_get_parent(np);
|
|
|
|
return of_node_get(args.np);
|
|
}
|
|
|
|
static struct device_node *of_get_next_dma_parent(struct device_node *np)
|
|
{
|
|
struct device_node *parent;
|
|
|
|
parent = __of_get_dma_parent(np);
|
|
of_node_put(np);
|
|
|
|
return parent;
|
|
}
|
|
|
|
u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
|
|
{
|
|
struct device_node *host;
|
|
u64 ret;
|
|
|
|
ret = __of_translate_address(dev, __of_get_dma_parent,
|
|
in_addr, "dma-ranges", &host);
|
|
|
|
if (host) {
|
|
of_node_put(host);
|
|
return OF_BAD_ADDR;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(of_translate_dma_address);
|
|
|
|
const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
|
|
unsigned int *flags)
|
|
{
|
|
const __be32 *prop;
|
|
unsigned int psize;
|
|
struct device_node *parent;
|
|
struct of_bus *bus;
|
|
int onesize, i, na, ns;
|
|
|
|
/* Get parent & match bus type */
|
|
parent = of_get_parent(dev);
|
|
if (parent == NULL)
|
|
return NULL;
|
|
bus = of_match_bus(parent);
|
|
bus->count_cells(dev, &na, &ns);
|
|
of_node_put(parent);
|
|
if (!OF_CHECK_ADDR_COUNT(na))
|
|
return NULL;
|
|
|
|
/* Get "reg" or "assigned-addresses" property */
|
|
prop = of_get_property(dev, bus->addresses, &psize);
|
|
if (prop == NULL)
|
|
return NULL;
|
|
psize /= 4;
|
|
|
|
onesize = na + ns;
|
|
for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
|
|
if (i == index) {
|
|
if (size)
|
|
*size = of_read_number(prop + na, ns);
|
|
if (flags)
|
|
*flags = bus->get_flags(prop);
|
|
return prop;
|
|
}
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL(of_get_address);
|
|
|
|
static int parser_init(struct of_pci_range_parser *parser,
|
|
struct device_node *node, const char *name)
|
|
{
|
|
int rlen;
|
|
|
|
parser->node = node;
|
|
parser->pna = of_n_addr_cells(node);
|
|
parser->na = of_bus_n_addr_cells(node);
|
|
parser->ns = of_bus_n_size_cells(node);
|
|
parser->dma = !strcmp(name, "dma-ranges");
|
|
parser->bus = of_match_bus(node);
|
|
|
|
parser->range = of_get_property(node, name, &rlen);
|
|
if (parser->range == NULL)
|
|
return -ENOENT;
|
|
|
|
parser->end = parser->range + rlen / sizeof(__be32);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int of_pci_range_parser_init(struct of_pci_range_parser *parser,
|
|
struct device_node *node)
|
|
{
|
|
return parser_init(parser, node, "ranges");
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
|
|
|
|
int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
|
|
struct device_node *node)
|
|
{
|
|
return parser_init(parser, node, "dma-ranges");
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init);
|
|
#define of_dma_range_parser_init of_pci_dma_range_parser_init
|
|
|
|
struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
|
|
struct of_pci_range *range)
|
|
{
|
|
int na = parser->na;
|
|
int ns = parser->ns;
|
|
int np = parser->pna + na + ns;
|
|
int busflag_na = 0;
|
|
|
|
if (!range)
|
|
return NULL;
|
|
|
|
if (!parser->range || parser->range + np > parser->end)
|
|
return NULL;
|
|
|
|
range->flags = parser->bus->get_flags(parser->range);
|
|
|
|
/* A extra cell for resource flags */
|
|
if (parser->bus->has_flags)
|
|
busflag_na = 1;
|
|
|
|
range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
|
|
|
|
if (parser->dma)
|
|
range->cpu_addr = of_translate_dma_address(parser->node,
|
|
parser->range + na);
|
|
else
|
|
range->cpu_addr = of_translate_address(parser->node,
|
|
parser->range + na);
|
|
range->size = of_read_number(parser->range + parser->pna + na, ns);
|
|
|
|
parser->range += np;
|
|
|
|
/* Now consume following elements while they are contiguous */
|
|
while (parser->range + np <= parser->end) {
|
|
u32 flags = 0;
|
|
u64 bus_addr, cpu_addr, size;
|
|
|
|
flags = parser->bus->get_flags(parser->range);
|
|
bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
|
|
if (parser->dma)
|
|
cpu_addr = of_translate_dma_address(parser->node,
|
|
parser->range + na);
|
|
else
|
|
cpu_addr = of_translate_address(parser->node,
|
|
parser->range + na);
|
|
size = of_read_number(parser->range + parser->pna + na, ns);
|
|
|
|
if (flags != range->flags)
|
|
break;
|
|
if (bus_addr != range->bus_addr + range->size ||
|
|
cpu_addr != range->cpu_addr + range->size)
|
|
break;
|
|
|
|
range->size += size;
|
|
parser->range += np;
|
|
}
|
|
|
|
return range;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
|
|
|
|
static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr,
|
|
u64 size)
|
|
{
|
|
u64 taddr;
|
|
unsigned long port;
|
|
struct device_node *host;
|
|
|
|
taddr = __of_translate_address(dev, of_get_parent,
|
|
in_addr, "ranges", &host);
|
|
if (host) {
|
|
/* host-specific port access */
|
|
port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size);
|
|
of_node_put(host);
|
|
} else {
|
|
/* memory-mapped I/O range */
|
|
port = pci_address_to_pio(taddr);
|
|
}
|
|
|
|
if (port == (unsigned long)-1)
|
|
return OF_BAD_ADDR;
|
|
|
|
return port;
|
|
}
|
|
|
|
static int __of_address_to_resource(struct device_node *dev,
|
|
const __be32 *addrp, u64 size, unsigned int flags,
|
|
const char *name, struct resource *r)
|
|
{
|
|
u64 taddr;
|
|
|
|
if (flags & IORESOURCE_MEM)
|
|
taddr = of_translate_address(dev, addrp);
|
|
else if (flags & IORESOURCE_IO)
|
|
taddr = of_translate_ioport(dev, addrp, size);
|
|
else
|
|
return -EINVAL;
|
|
|
|
if (taddr == OF_BAD_ADDR)
|
|
return -EINVAL;
|
|
memset(r, 0, sizeof(struct resource));
|
|
|
|
r->start = taddr;
|
|
r->end = taddr + size - 1;
|
|
r->flags = flags;
|
|
r->name = name ? name : dev->full_name;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* of_address_to_resource - Translate device tree address and return as resource
|
|
*
|
|
* Note that if your address is a PIO address, the conversion will fail if
|
|
* the physical address can't be internally converted to an IO token with
|
|
* pci_address_to_pio(), that is because it's either called too early or it
|
|
* can't be matched to any host bridge IO space
|
|
*/
|
|
int of_address_to_resource(struct device_node *dev, int index,
|
|
struct resource *r)
|
|
{
|
|
const __be32 *addrp;
|
|
u64 size;
|
|
unsigned int flags;
|
|
const char *name = NULL;
|
|
|
|
addrp = of_get_address(dev, index, &size, &flags);
|
|
if (addrp == NULL)
|
|
return -EINVAL;
|
|
|
|
/* Get optional "reg-names" property to add a name to a resource */
|
|
of_property_read_string_index(dev, "reg-names", index, &name);
|
|
|
|
return __of_address_to_resource(dev, addrp, size, flags, name, r);
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_address_to_resource);
|
|
|
|
/**
|
|
* of_iomap - Maps the memory mapped IO for a given device_node
|
|
* @np: the device whose io range will be mapped
|
|
* @index: index of the io range
|
|
*
|
|
* Returns a pointer to the mapped memory
|
|
*/
|
|
void __iomem *of_iomap(struct device_node *np, int index)
|
|
{
|
|
struct resource res;
|
|
|
|
if (of_address_to_resource(np, index, &res))
|
|
return NULL;
|
|
|
|
return ioremap(res.start, resource_size(&res));
|
|
}
|
|
EXPORT_SYMBOL(of_iomap);
|
|
|
|
/*
|
|
* of_io_request_and_map - Requests a resource and maps the memory mapped IO
|
|
* for a given device_node
|
|
* @device: the device whose io range will be mapped
|
|
* @index: index of the io range
|
|
* @name: name "override" for the memory region request or NULL
|
|
*
|
|
* Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
|
|
* error code on failure. Usage example:
|
|
*
|
|
* base = of_io_request_and_map(node, 0, "foo");
|
|
* if (IS_ERR(base))
|
|
* return PTR_ERR(base);
|
|
*/
|
|
void __iomem *of_io_request_and_map(struct device_node *np, int index,
|
|
const char *name)
|
|
{
|
|
struct resource res;
|
|
void __iomem *mem;
|
|
|
|
if (of_address_to_resource(np, index, &res))
|
|
return IOMEM_ERR_PTR(-EINVAL);
|
|
|
|
if (!name)
|
|
name = res.name;
|
|
if (!request_mem_region(res.start, resource_size(&res), name))
|
|
return IOMEM_ERR_PTR(-EBUSY);
|
|
|
|
mem = ioremap(res.start, resource_size(&res));
|
|
if (!mem) {
|
|
release_mem_region(res.start, resource_size(&res));
|
|
return IOMEM_ERR_PTR(-ENOMEM);
|
|
}
|
|
|
|
return mem;
|
|
}
|
|
EXPORT_SYMBOL(of_io_request_and_map);
|
|
|
|
#ifdef CONFIG_HAS_DMA
|
|
/**
|
|
* of_dma_get_range - Get DMA range info and put it into a map array
|
|
* @np: device node to get DMA range info
|
|
* @map: dma range structure to return
|
|
*
|
|
* Look in bottom up direction for the first "dma-ranges" property
|
|
* and parse it. Put the information into a DMA offset map array.
|
|
*
|
|
* dma-ranges format:
|
|
* DMA addr (dma_addr) : naddr cells
|
|
* CPU addr (phys_addr_t) : pna cells
|
|
* size : nsize cells
|
|
*
|
|
* It returns -ENODEV if "dma-ranges" property was not found for this
|
|
* device in the DT.
|
|
*/
|
|
int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map)
|
|
{
|
|
struct device_node *node = of_node_get(np);
|
|
const __be32 *ranges = NULL;
|
|
bool found_dma_ranges = false;
|
|
struct of_range_parser parser;
|
|
struct of_range range;
|
|
struct bus_dma_region *r;
|
|
int len, num_ranges = 0;
|
|
int ret = 0;
|
|
|
|
while (node) {
|
|
ranges = of_get_property(node, "dma-ranges", &len);
|
|
|
|
/* Ignore empty ranges, they imply no translation required */
|
|
if (ranges && len > 0)
|
|
break;
|
|
|
|
/* Once we find 'dma-ranges', then a missing one is an error */
|
|
if (found_dma_ranges && !ranges) {
|
|
ret = -ENODEV;
|
|
goto out;
|
|
}
|
|
found_dma_ranges = true;
|
|
|
|
node = of_get_next_dma_parent(node);
|
|
}
|
|
|
|
if (!node || !ranges) {
|
|
pr_debug("no dma-ranges found for node(%pOF)\n", np);
|
|
ret = -ENODEV;
|
|
goto out;
|
|
}
|
|
|
|
of_dma_range_parser_init(&parser, node);
|
|
for_each_of_range(&parser, &range)
|
|
num_ranges++;
|
|
|
|
r = kcalloc(num_ranges + 1, sizeof(*r), GFP_KERNEL);
|
|
if (!r) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
/*
|
|
* Record all info in the generic DMA ranges array for struct device.
|
|
*/
|
|
*map = r;
|
|
of_dma_range_parser_init(&parser, node);
|
|
for_each_of_range(&parser, &range) {
|
|
pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
|
|
range.bus_addr, range.cpu_addr, range.size);
|
|
if (range.cpu_addr == OF_BAD_ADDR) {
|
|
pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n",
|
|
range.bus_addr, node);
|
|
continue;
|
|
}
|
|
r->cpu_start = range.cpu_addr;
|
|
r->dma_start = range.bus_addr;
|
|
r->size = range.size;
|
|
r->offset = range.cpu_addr - range.bus_addr;
|
|
r++;
|
|
}
|
|
out:
|
|
of_node_put(node);
|
|
return ret;
|
|
}
|
|
#endif /* CONFIG_HAS_DMA */
|
|
|
|
/**
|
|
* of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA
|
|
* @np: The node to start searching from or NULL to start from the root
|
|
*
|
|
* Gets the highest CPU physical address that is addressable by all DMA masters
|
|
* in the sub-tree pointed by np, or the whole tree if NULL is passed. If no
|
|
* DMA constrained device is found, it returns PHYS_ADDR_MAX.
|
|
*/
|
|
phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np)
|
|
{
|
|
phys_addr_t max_cpu_addr = PHYS_ADDR_MAX;
|
|
struct of_range_parser parser;
|
|
phys_addr_t subtree_max_addr;
|
|
struct device_node *child;
|
|
struct of_range range;
|
|
const __be32 *ranges;
|
|
u64 cpu_end = 0;
|
|
int len;
|
|
|
|
if (!np)
|
|
np = of_root;
|
|
|
|
ranges = of_get_property(np, "dma-ranges", &len);
|
|
if (ranges && len) {
|
|
of_dma_range_parser_init(&parser, np);
|
|
for_each_of_range(&parser, &range)
|
|
if (range.cpu_addr + range.size > cpu_end)
|
|
cpu_end = range.cpu_addr + range.size - 1;
|
|
|
|
if (max_cpu_addr > cpu_end)
|
|
max_cpu_addr = cpu_end;
|
|
}
|
|
|
|
for_each_available_child_of_node(np, child) {
|
|
subtree_max_addr = of_dma_get_max_cpu_address(child);
|
|
if (max_cpu_addr > subtree_max_addr)
|
|
max_cpu_addr = subtree_max_addr;
|
|
}
|
|
|
|
return max_cpu_addr;
|
|
}
|
|
|
|
/**
|
|
* of_dma_is_coherent - Check if device is coherent
|
|
* @np: device node
|
|
*
|
|
* It returns true if "dma-coherent" property was found
|
|
* for this device in the DT, or if DMA is coherent by
|
|
* default for OF devices on the current platform.
|
|
*/
|
|
bool of_dma_is_coherent(struct device_node *np)
|
|
{
|
|
struct device_node *node;
|
|
|
|
if (IS_ENABLED(CONFIG_OF_DMA_DEFAULT_COHERENT))
|
|
return true;
|
|
|
|
node = of_node_get(np);
|
|
|
|
while (node) {
|
|
if (of_property_read_bool(node, "dma-coherent")) {
|
|
of_node_put(node);
|
|
return true;
|
|
}
|
|
node = of_get_next_dma_parent(node);
|
|
}
|
|
of_node_put(node);
|
|
return false;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_dma_is_coherent);
|