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8b31e49d1d
The implementation we just revived has issues, such as using a Kconfig-defined virtual address area in kernel space that nothing actually carves out (and thus will overlap whatever is there), or having some dependencies on being self contained in a single PTE page which adds unnecessary constraints on the kernel virtual address space. This fixes it by using more classic PTE accessors and automatically locating the area for consistent memory, carving an appropriate hole in the kernel virtual address space, leaving only the size of that area as a Kconfig option. It also brings some dma-mask related fixes from the ARM implementation which was almost identical initially but grew its own fixes. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
435 lines
12 KiB
C
435 lines
12 KiB
C
/*
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* Copyright (C) 2004 IBM
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*
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* Implements the generic device dma API for powerpc.
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* the pci and vio busses
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*/
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#ifndef _ASM_DMA_MAPPING_H
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#define _ASM_DMA_MAPPING_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <linux/cache.h>
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/* need struct page definitions */
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-attrs.h>
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#include <asm/io.h>
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#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
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#ifdef CONFIG_NOT_COHERENT_CACHE
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/*
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* DMA-consistent mapping functions for PowerPCs that don't support
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* cache snooping. These allocate/free a region of uncached mapped
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* memory space for use with DMA devices. Alternatively, you could
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* allocate the space "normally" and use the cache management functions
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* to ensure it is consistent.
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*/
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struct device;
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extern void *__dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp);
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extern void __dma_free_coherent(size_t size, void *vaddr);
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extern void __dma_sync(void *vaddr, size_t size, int direction);
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extern void __dma_sync_page(struct page *page, unsigned long offset,
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size_t size, int direction);
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#else /* ! CONFIG_NOT_COHERENT_CACHE */
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/*
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* Cache coherent cores.
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*/
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#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
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#define __dma_free_coherent(size, addr) ((void)0)
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#define __dma_sync(addr, size, rw) ((void)0)
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#define __dma_sync_page(pg, off, sz, rw) ((void)0)
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#endif /* ! CONFIG_NOT_COHERENT_CACHE */
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static inline unsigned long device_to_mask(struct device *dev)
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{
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if (dev->dma_mask && *dev->dma_mask)
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return *dev->dma_mask;
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/* Assume devices without mask can take 32 bit addresses */
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return 0xfffffffful;
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}
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/*
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* DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
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*/
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struct dma_mapping_ops {
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void * (*alloc_coherent)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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void (*free_coherent)(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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int (*map_sg)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs);
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void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs);
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int (*dma_supported)(struct device *dev, u64 mask);
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int (*set_dma_mask)(struct device *dev, u64 dma_mask);
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dma_addr_t (*map_page)(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs);
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void (*unmap_page)(struct device *dev,
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dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs);
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#ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
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void (*sync_single_range_for_cpu)(struct device *hwdev,
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dma_addr_t dma_handle, unsigned long offset,
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size_t size,
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enum dma_data_direction direction);
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void (*sync_single_range_for_device)(struct device *hwdev,
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dma_addr_t dma_handle, unsigned long offset,
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size_t size,
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enum dma_data_direction direction);
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void (*sync_sg_for_cpu)(struct device *hwdev,
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struct scatterlist *sg, int nelems,
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enum dma_data_direction direction);
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void (*sync_sg_for_device)(struct device *hwdev,
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struct scatterlist *sg, int nelems,
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enum dma_data_direction direction);
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#endif
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};
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/*
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* Available generic sets of operations
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*/
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#ifdef CONFIG_PPC64
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extern struct dma_mapping_ops dma_iommu_ops;
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#endif
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extern struct dma_mapping_ops dma_direct_ops;
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static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
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{
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/* We don't handle the NULL dev case for ISA for now. We could
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* do it via an out of line call but it is not needed for now. The
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* only ISA DMA device we support is the floppy and we have a hack
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* in the floppy driver directly to get a device for us.
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*/
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if (unlikely(dev == NULL))
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return NULL;
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return dev->archdata.dma_ops;
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}
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static inline void set_dma_ops(struct device *dev, struct dma_mapping_ops *ops)
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{
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dev->archdata.dma_ops = ops;
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}
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static inline int dma_supported(struct device *dev, u64 mask)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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if (unlikely(dma_ops == NULL))
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return 0;
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if (dma_ops->dma_supported == NULL)
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return 1;
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return dma_ops->dma_supported(dev, mask);
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}
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/* We have our own implementation of pci_set_dma_mask() */
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#define HAVE_ARCH_PCI_SET_DMA_MASK
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static inline int dma_set_mask(struct device *dev, u64 dma_mask)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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if (unlikely(dma_ops == NULL))
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return -EIO;
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if (dma_ops->set_dma_mask != NULL)
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return dma_ops->set_dma_mask(dev, dma_mask);
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if (!dev->dma_mask || !dma_supported(dev, dma_mask))
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return -EIO;
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*dev->dma_mask = dma_mask;
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return 0;
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}
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/*
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* map_/unmap_single actually call through to map/unmap_page now that all the
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* dma_mapping_ops have been converted over. We just have to get the page and
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* offset to pass through to map_page
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*/
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static inline dma_addr_t dma_map_single_attrs(struct device *dev,
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void *cpu_addr,
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size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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return dma_ops->map_page(dev, virt_to_page(cpu_addr),
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(unsigned long)cpu_addr % PAGE_SIZE, size,
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direction, attrs);
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}
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static inline void dma_unmap_single_attrs(struct device *dev,
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dma_addr_t dma_addr,
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size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
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}
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static inline dma_addr_t dma_map_page_attrs(struct device *dev,
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struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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return dma_ops->map_page(dev, page, offset, size, direction, attrs);
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}
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static inline void dma_unmap_page_attrs(struct device *dev,
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dma_addr_t dma_address,
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size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
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}
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static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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return dma_ops->map_sg(dev, sg, nents, direction, attrs);
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}
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static inline void dma_unmap_sg_attrs(struct device *dev,
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struct scatterlist *sg,
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int nhwentries,
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs);
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}
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
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}
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static inline void dma_free_coherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
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}
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static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
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size_t size,
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enum dma_data_direction direction)
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{
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return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL);
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}
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static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
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size_t size,
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enum dma_data_direction direction)
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{
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dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL);
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}
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static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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return dma_map_page_attrs(dev, page, offset, size, direction, NULL);
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}
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static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size,
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enum dma_data_direction direction)
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{
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dma_unmap_page_attrs(dev, dma_address, size, direction, NULL);
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}
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static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction)
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{
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return dma_map_sg_attrs(dev, sg, nents, direction, NULL);
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}
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static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries,
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enum dma_data_direction direction)
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{
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dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
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}
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#ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
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static inline void dma_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
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size, direction);
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}
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static inline void dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->sync_single_range_for_device(dev, dma_handle,
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0, size, direction);
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}
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static inline void dma_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
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}
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static inline void dma_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
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}
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static inline void dma_sync_single_range_for_cpu(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->sync_single_range_for_cpu(dev, dma_handle,
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offset, size, direction);
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}
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static inline void dma_sync_single_range_for_device(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
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size, direction);
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}
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#else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */
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static inline void dma_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline void dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline void dma_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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}
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static inline void dma_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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}
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static inline void dma_sync_single_range_for_cpu(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline void dma_sync_single_range_for_device(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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}
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#endif
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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#ifdef CONFIG_PPC64
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return (dma_addr == DMA_ERROR_CODE);
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#else
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return 0;
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#endif
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}
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#ifdef CONFIG_NOT_COHERENT_CACHE
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#define dma_is_consistent(d, h) (0)
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#else
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#define dma_is_consistent(d, h) (1)
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#endif
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static inline int dma_get_cache_alignment(void)
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{
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#ifdef CONFIG_PPC64
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/* no easy way to get cache size on all processors, so return
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* the maximum possible, to be safe */
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return (1 << INTERNODE_CACHE_SHIFT);
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#else
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/*
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* Each processor family will define its own L1_CACHE_SHIFT,
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* L1_CACHE_BYTES wraps to this, so this is always safe.
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*/
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return L1_CACHE_BYTES;
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#endif
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}
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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__dma_sync(vaddr, size, (int)direction);
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_DMA_MAPPING_H */
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