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![Suresh Siddha](/assets/img/avatar_default.png)
This will pave the way for each apic driver to be self-contained and eliminate the need for apic_probe[]. Order in which apic drivers are listed in the .apicdrivers section is important, as this determines the apic probe order. And this is enforced by the ordering of apic driver files in the Makefile and the macros apic_driver()/apic_drivers(). Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Tested-by: Cyrill Gorcunov <gorcunov@openvz.org> Cc: steiner@sgi.com Cc: gorcunov@openvz.org Cc: yinghai@kernel.org Link: http://lkml.kernel.org/r/20110521005526.068775085@sbsiddha-MOBL3.sc.intel.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
384 lines
9.7 KiB
C
384 lines
9.7 KiB
C
/*
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* Copyright 2004 James Cleverdon, IBM.
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* Subject to the GNU Public License, v.2
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*
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* Flat APIC subarch code.
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*
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* Hacked for x86-64 by James Cleverdon from i386 architecture code by
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* Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
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* James Cleverdon.
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*/
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#include <linux/errno.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/ctype.h>
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#include <linux/init.h>
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#include <linux/hardirq.h>
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#include <asm/smp.h>
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#include <asm/apic.h>
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#include <asm/ipi.h>
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#ifdef CONFIG_ACPI
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#include <acpi/acpi_bus.h>
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#endif
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static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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{
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return 1;
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}
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static const struct cpumask *flat_target_cpus(void)
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{
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return cpu_online_mask;
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}
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static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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cpumask_clear(retmask);
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cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
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}
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/*
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* Set up the logical destination ID.
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*
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* Intel recommends to set DFR, LDR and TPR before enabling
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* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
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* document number 292116). So here it goes...
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*/
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static void flat_init_apic_ldr(void)
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{
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unsigned long val;
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unsigned long num, id;
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num = smp_processor_id();
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id = 1UL << num;
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apic_write(APIC_DFR, APIC_DFR_FLAT);
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val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
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val |= SET_APIC_LOGICAL_ID(id);
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apic_write(APIC_LDR, val);
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}
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static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
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{
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unsigned long flags;
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local_irq_save(flags);
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__default_send_IPI_dest_field(mask, vector, apic->dest_logical);
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local_irq_restore(flags);
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}
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static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
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{
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unsigned long mask = cpumask_bits(cpumask)[0];
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_flat_send_IPI_mask(mask, vector);
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}
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static void
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flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
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{
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unsigned long mask = cpumask_bits(cpumask)[0];
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int cpu = smp_processor_id();
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if (cpu < BITS_PER_LONG)
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clear_bit(cpu, &mask);
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_flat_send_IPI_mask(mask, vector);
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}
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static void flat_send_IPI_allbutself(int vector)
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{
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int cpu = smp_processor_id();
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#ifdef CONFIG_HOTPLUG_CPU
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int hotplug = 1;
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#else
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int hotplug = 0;
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#endif
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if (hotplug || vector == NMI_VECTOR) {
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if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) {
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unsigned long mask = cpumask_bits(cpu_online_mask)[0];
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if (cpu < BITS_PER_LONG)
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clear_bit(cpu, &mask);
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_flat_send_IPI_mask(mask, vector);
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}
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} else if (num_online_cpus() > 1) {
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__default_send_IPI_shortcut(APIC_DEST_ALLBUT,
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vector, apic->dest_logical);
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}
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}
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static void flat_send_IPI_all(int vector)
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{
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if (vector == NMI_VECTOR) {
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flat_send_IPI_mask(cpu_online_mask, vector);
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} else {
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__default_send_IPI_shortcut(APIC_DEST_ALLINC,
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vector, apic->dest_logical);
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}
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}
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static unsigned int flat_get_apic_id(unsigned long x)
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{
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unsigned int id;
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id = (((x)>>24) & 0xFFu);
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return id;
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}
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static unsigned long set_apic_id(unsigned int id)
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{
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unsigned long x;
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x = ((id & 0xFFu)<<24);
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return x;
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}
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static unsigned int read_xapic_id(void)
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{
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unsigned int id;
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id = flat_get_apic_id(apic_read(APIC_ID));
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return id;
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}
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static int flat_apic_id_registered(void)
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{
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return physid_isset(read_xapic_id(), phys_cpu_present_map);
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}
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static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
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{
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return initial_apic_id >> index_msb;
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}
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struct apic apic_flat = {
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.name = "flat",
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.probe = NULL,
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.acpi_madt_oem_check = flat_acpi_madt_oem_check,
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.apic_id_registered = flat_apic_id_registered,
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.irq_delivery_mode = dest_LowestPrio,
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.irq_dest_mode = 1, /* logical */
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.target_cpus = flat_target_cpus,
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.disable_esr = 0,
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.dest_logical = APIC_DEST_LOGICAL,
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.check_apicid_used = NULL,
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.check_apicid_present = NULL,
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.vector_allocation_domain = flat_vector_allocation_domain,
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.init_apic_ldr = flat_init_apic_ldr,
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.ioapic_phys_id_map = NULL,
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.setup_apic_routing = NULL,
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.multi_timer_check = NULL,
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.cpu_present_to_apicid = default_cpu_present_to_apicid,
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.apicid_to_cpu_present = NULL,
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.setup_portio_remap = NULL,
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.check_phys_apicid_present = default_check_phys_apicid_present,
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.enable_apic_mode = NULL,
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.phys_pkg_id = flat_phys_pkg_id,
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.mps_oem_check = NULL,
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.get_apic_id = flat_get_apic_id,
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.set_apic_id = set_apic_id,
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.apic_id_mask = 0xFFu << 24,
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.cpu_mask_to_apicid = default_cpu_mask_to_apicid,
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.cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
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.send_IPI_mask = flat_send_IPI_mask,
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.send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
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.send_IPI_allbutself = flat_send_IPI_allbutself,
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.send_IPI_all = flat_send_IPI_all,
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.send_IPI_self = apic_send_IPI_self,
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.trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
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.trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
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.wait_for_init_deassert = NULL,
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.smp_callin_clear_local_apic = NULL,
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.inquire_remote_apic = default_inquire_remote_apic,
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.read = native_apic_mem_read,
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.write = native_apic_mem_write,
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.icr_read = native_apic_icr_read,
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.icr_write = native_apic_icr_write,
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.wait_icr_idle = native_apic_wait_icr_idle,
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.safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
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};
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/*
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* Physflat mode is used when there are more than 8 CPUs on a system.
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* We cannot use logical delivery in this case because the mask
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* overflows, so use physical mode.
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*/
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static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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{
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#ifdef CONFIG_ACPI
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/*
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* Quirk: some x86_64 machines can only use physical APIC mode
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* regardless of how many processors are present (x86_64 ES7000
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* is an example).
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*/
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if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
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(acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
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printk(KERN_DEBUG "system APIC only can use physical flat");
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return 1;
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}
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if (!strncmp(oem_id, "IBM", 3) && !strncmp(oem_table_id, "EXA", 3)) {
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printk(KERN_DEBUG "IBM Summit detected, will use apic physical");
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return 1;
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}
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#endif
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return 0;
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}
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static const struct cpumask *physflat_target_cpus(void)
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{
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return cpu_online_mask;
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}
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static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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cpumask_clear(retmask);
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cpumask_set_cpu(cpu, retmask);
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}
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static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
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{
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default_send_IPI_mask_sequence_phys(cpumask, vector);
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}
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static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
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int vector)
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{
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default_send_IPI_mask_allbutself_phys(cpumask, vector);
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}
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static void physflat_send_IPI_allbutself(int vector)
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{
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default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
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}
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static void physflat_send_IPI_all(int vector)
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{
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physflat_send_IPI_mask(cpu_online_mask, vector);
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}
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static unsigned int physflat_cpu_mask_to_apicid(const struct cpumask *cpumask)
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{
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int cpu;
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/*
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* We're using fixed IRQ delivery, can only return one phys APIC ID.
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* May as well be the first.
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*/
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cpu = cpumask_first(cpumask);
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if ((unsigned)cpu < nr_cpu_ids)
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return per_cpu(x86_cpu_to_apicid, cpu);
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else
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return BAD_APICID;
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}
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static unsigned int
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physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
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const struct cpumask *andmask)
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{
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int cpu;
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/*
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* We're using fixed IRQ delivery, can only return one phys APIC ID.
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* May as well be the first.
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*/
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for_each_cpu_and(cpu, cpumask, andmask) {
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if (cpumask_test_cpu(cpu, cpu_online_mask))
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break;
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}
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return per_cpu(x86_cpu_to_apicid, cpu);
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}
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static int physflat_probe(void)
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{
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if (apic == &apic_physflat || num_possible_cpus() > 8)
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return 1;
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return 0;
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}
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struct apic apic_physflat = {
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.name = "physical flat",
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.probe = physflat_probe,
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.acpi_madt_oem_check = physflat_acpi_madt_oem_check,
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.apic_id_registered = flat_apic_id_registered,
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.irq_delivery_mode = dest_Fixed,
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.irq_dest_mode = 0, /* physical */
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.target_cpus = physflat_target_cpus,
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.disable_esr = 0,
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.dest_logical = 0,
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.check_apicid_used = NULL,
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.check_apicid_present = NULL,
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.vector_allocation_domain = physflat_vector_allocation_domain,
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/* not needed, but shouldn't hurt: */
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.init_apic_ldr = flat_init_apic_ldr,
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.ioapic_phys_id_map = NULL,
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.setup_apic_routing = NULL,
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.multi_timer_check = NULL,
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.cpu_present_to_apicid = default_cpu_present_to_apicid,
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.apicid_to_cpu_present = NULL,
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.setup_portio_remap = NULL,
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.check_phys_apicid_present = default_check_phys_apicid_present,
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.enable_apic_mode = NULL,
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.phys_pkg_id = flat_phys_pkg_id,
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.mps_oem_check = NULL,
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.get_apic_id = flat_get_apic_id,
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.set_apic_id = set_apic_id,
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.apic_id_mask = 0xFFu << 24,
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.cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
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.cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
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.send_IPI_mask = physflat_send_IPI_mask,
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.send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
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.send_IPI_allbutself = physflat_send_IPI_allbutself,
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.send_IPI_all = physflat_send_IPI_all,
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.send_IPI_self = apic_send_IPI_self,
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.trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
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.trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
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.wait_for_init_deassert = NULL,
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.smp_callin_clear_local_apic = NULL,
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.inquire_remote_apic = default_inquire_remote_apic,
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.read = native_apic_mem_read,
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.write = native_apic_mem_write,
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.icr_read = native_apic_icr_read,
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.icr_write = native_apic_icr_write,
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.wait_icr_idle = native_apic_wait_icr_idle,
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.safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
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};
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/*
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* We need to check for physflat first, so this order is important.
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*/
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apic_drivers(apic_physflat, apic_flat);
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