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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 and only version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin street fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 94 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141334.043630402@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
77 lines
2.1 KiB
C
77 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* First-level interrupt controller model for Hexagon.
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*
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* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
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*/
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#include <linux/interrupt.h>
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#include <asm/irq.h>
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#include <asm/hexagon_vm.h>
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static void mask_irq(struct irq_data *data)
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{
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__vmintop_locdis((long) data->irq);
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}
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static void mask_irq_num(unsigned int irq)
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{
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__vmintop_locdis((long) irq);
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}
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static void unmask_irq(struct irq_data *data)
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{
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__vmintop_locen((long) data->irq);
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}
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/* This is actually all we need for handle_fasteoi_irq */
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static void eoi_irq(struct irq_data *data)
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{
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__vmintop_globen((long) data->irq);
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}
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/* Power mamangement wake call. We don't need this, however,
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* if this is absent, then an -ENXIO error is returned to the
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* msm_serial driver, and it fails to correctly initialize.
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* This is a bug in the msm_serial driver, but, for now, we
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* work around it here, by providing this bogus handler.
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* XXX FIXME!!! remove this when msm_serial is fixed.
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*/
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static int set_wake(struct irq_data *data, unsigned int on)
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{
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return 0;
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}
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static struct irq_chip hexagon_irq_chip = {
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.name = "HEXAGON",
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.irq_mask = mask_irq,
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.irq_unmask = unmask_irq,
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.irq_set_wake = set_wake,
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.irq_eoi = eoi_irq
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};
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/**
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* The hexagon core comes with a first-level interrupt controller
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* with 32 total possible interrupts. When the core is embedded
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* into different systems/platforms, it is typically wrapped by
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* macro cells that provide one or more second-level interrupt
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* controllers that are cascaded into one or more of the first-level
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* interrupts handled here. The precise wiring of these other
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* irqs varies from platform to platform, and are set up & configured
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* in the platform-specific files.
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*
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* The first-level interrupt controller is wrapped by the VM, which
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* virtualizes the interrupt controller for us. It provides a very
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* simple, fast & efficient API, and so the fasteoi handler is
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* appropriate for this case.
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*/
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void __init init_IRQ(void)
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{
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int irq;
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for (irq = 0; irq < HEXAGON_CPUINTS; irq++) {
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mask_irq_num(irq);
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irq_set_chip_and_handler(irq, &hexagon_irq_chip,
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handle_fasteoi_irq);
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}
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}
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