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fe1bd78bf1
The docs for the spi_imx platform data still refer to a -32 offset used to specify a native chip select. This was removed in commit602c8f4485("spi: imx: fix use of native chip-selects with devicetree") and no longer works as documented. Update documentation. The macro MXC_SPI_CS() is no longer is needed. If a board uses all native chip selects, then it's not necessary to specify a chip select array at all, as all native is the default (this is how device-tree configured SPI masters work too). Most of the spi-imx platform data users have their chip select arrays removed by this patch. This patch also fixes a bug in mx31moboard introduced in the '602 commit. When that board was updated in commit901f26bce6("ARM: imx: set correct chip_select in platform setup") to reflect the SPI change, only SPI bus 2 was updated and SPI bus 1 was left with non-sequential chip selects. The mc13783 spi device on bus 1 had its chip select updated as if it were on bus 2. CC: Sascha Hauer <kernel@pengutronix.de> CC: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Greg Ungerer <gerg@linux-m68k.org> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Trent Piepho <tpiepho@impinj.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
33 lines
1.4 KiB
C
33 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __MACH_SPI_H_
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#define __MACH_SPI_H_
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/*
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* struct spi_imx_master - device.platform_data for SPI controller devices.
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* @chipselect: Array of chipselects for this master or NULL. Numbers >= 0
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* mean GPIO pins, -ENOENT means internal CSPI chipselect
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* matching the position in the array. E.g., if chipselect[1] =
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* -ENOENT then a SPI slave using chip select 1 will use the
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* native SS1 line of the CSPI. Omitting the array will use
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* all native chip selects.
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* Normally you want to use gpio based chip selects as the CSPI
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* module tries to be intelligent about when to assert the
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* chipselect: The CSPI module deasserts the chipselect once it
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* runs out of input data. The other problem is that it is not
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* possible to mix between high active and low active chipselects
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* on one single bus using the internal chipselects.
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* Unfortunately, on some SoCs, Freescale decided to put some
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* chipselects on dedicated pins which are not usable as gpios,
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* so we have to support the internal chipselects.
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*
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* @num_chipselect: If @chipselect is specified, ARRAY_SIZE(chipselect),
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* otherwise the number of native chip selects.
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*/
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struct spi_imx_master {
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int *chipselect;
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int num_chipselect;
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};
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#endif /* __MACH_SPI_H_*/
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