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Some atomics can be implemented in several different ways, e.g. FULL/ACQUIRE/RELEASE ordered atomics can be implemented in terms of RELAXED atomics, and ACQUIRE/RELEASE/RELAXED can be implemented in terms of FULL ordered atomics. Other atomics are optional, and don't exist in some configurations (e.g. not all architectures implement the 128-bit cmpxchg ops). Subsequent patches will require that architectures define a preprocessor symbol for any atomic (or ordering variant) which is optional. This will make the fallback ifdeffery more robust, and simplify future changes. Add the required definitions to arch/sparc. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20230605070124.3741859-12-mark.rutland@arm.com
73 lines
2.2 KiB
C
73 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* atomic.h: Thankfully the V9 is at least reasonable for this
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* stuff.
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*
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* Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com)
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*/
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#ifndef __ARCH_SPARC64_ATOMIC__
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#define __ARCH_SPARC64_ATOMIC__
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#include <linux/types.h>
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#define ATOMIC64_INIT(i) { (i) }
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#define arch_atomic_read(v) READ_ONCE((v)->counter)
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#define arch_atomic64_read(v) READ_ONCE((v)->counter)
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#define arch_atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
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#define arch_atomic64_set(v, i) WRITE_ONCE(((v)->counter), (i))
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#define ATOMIC_OP(op) \
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void arch_atomic_##op(int, atomic_t *); \
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void arch_atomic64_##op(s64, atomic64_t *);
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#define ATOMIC_OP_RETURN(op) \
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int arch_atomic_##op##_return(int, atomic_t *); \
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s64 arch_atomic64_##op##_return(s64, atomic64_t *);
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#define ATOMIC_FETCH_OP(op) \
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int arch_atomic_fetch_##op(int, atomic_t *); \
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s64 arch_atomic64_fetch_##op(s64, atomic64_t *);
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#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op)
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define arch_atomic_add_return arch_atomic_add_return
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#define arch_atomic_sub_return arch_atomic_sub_return
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#define arch_atomic_fetch_add arch_atomic_fetch_add
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#define arch_atomic_fetch_sub arch_atomic_fetch_sub
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#define arch_atomic64_add_return arch_atomic64_add_return
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#define arch_atomic64_sub_return arch_atomic64_sub_return
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#define arch_atomic64_fetch_add arch_atomic64_fetch_add
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#define arch_atomic64_fetch_sub arch_atomic64_fetch_sub
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#undef ATOMIC_OPS
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#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)
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ATOMIC_OPS(and)
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ATOMIC_OPS(or)
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ATOMIC_OPS(xor)
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#define arch_atomic_fetch_and arch_atomic_fetch_and
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#define arch_atomic_fetch_or arch_atomic_fetch_or
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#define arch_atomic_fetch_xor arch_atomic_fetch_xor
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#define arch_atomic64_fetch_and arch_atomic64_fetch_and
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#define arch_atomic64_fetch_or arch_atomic64_fetch_or
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#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor
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#undef ATOMIC_OPS
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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s64 arch_atomic64_dec_if_positive(atomic64_t *v);
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#define arch_atomic64_dec_if_positive arch_atomic64_dec_if_positive
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#endif /* !(__ARCH_SPARC64_ATOMIC__) */
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